mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 255

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

AC Electrical Characteristics - Receive Basic Frame Pulse Pin Timing
AC Electrical Characteristics - PCM24 Transmit Timing
1
2
3
1
RXDL
Timeslots
EXCLi
RxDLC - Note 2
(Output)
RxDLC - Note 3
(Output)
RxDL
(Output)
Note 1 - RxDLC output applies for every second frame (RxBF) pulse (250 us) only
Note 2 - Clock output provided by setting control bit DLCK=1 (register address Y06)
Note 3 - Enable output provided by clearing control bit DLCK=0 (register address Y06)
RXDL
Bit Cells
EXCLi
RxBF
(Output)
Transmit Delay
Transmit Delay in RZ mode
Transmit Invalid in RZ Mode
Basic Frame Output Delay
Characteristics
Characteristics
tDDR
t
ED
Figure 50 - Receive Basic Frame Pulse Pin Timing
Figure 49 - Receive DataLink Timing Diagram
Outputs Data
Timeslot 23 Bit 8
Sym.
tr
tr
MT9072
t
TD
TD
DI
Timeslot23
Bit 8
Sym.
Zarlink Semiconductor Inc.
t
t
CD
Min.
BD
MT9072
Min.
Typ.
200
200
255
50
Typ.
Max.
100
t
BD
Max.
Units
ns
ns
ns
S bit
Bit
S
Units
150 pF load on TPOS and TNEG
150 pF load on TPOS and TNEG
150 pF load on TPOS and TNEG
ns
150 pF load on RxBF
Test Conditions
Test Conditions
Data Sheet
V
T
V
V
V
VT
V
T
T
T
T