zl30102 Zarlink Semiconductor, zl30102 Datasheet - Page 44

• Manufacturer Part Number: zl30102
• Description: T1/e1 Stratum 4/4e Redundant System Clock Synchronizer For Ds1/e1 And H.110
• Manufacturer: Zarlink Semiconductor

7.2
Performance Characteristics* - Functional
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
10
12
13
14
15
11
1
2
3
4
5
6
7
8
9
Reference Out of Range Threshold
Performance Characteristics
Output Phase Continuity (MTIE)
Holdover accuracy
Holdover stability
Freerun accuracy
Capture range
DS1
E1
1.8 Hz filter
58 Hz filter (8 kHz reference)
922 Hz filter
fast lock
Reference switching
Switching from Normal mode to
Holdover mode
Switching from Holdover mode to
Normal mode
primary master mode
secondary master mode
(including hysteresis)
Output Phase Slope
Lock Time
Characteristics
Zarlink Semiconductor Inc.
ZL30102
Min.
-130
-100
-130
-64
-83
40
15
1
1
44
Max.
+130
+100
+130
+64
+83
0.1
9.5
50
15
13
13
61
0
0
1
1
0
Units
ms/s
ppm
ppm
ppm
ppm
ppm
ppm
µ/s
ns
ns
ns
s
s
s
s
Determined by stability of the
20 MHz master clock oscillator
Determined by accuracy of the
20 MHz master clock oscillator
The 20 MHz master clock oscillator
set at 0 ppm
The 20 MHz master clock oscillator
set at 0 ppm
The 20 MHz master clock oscillator
set at 0 ppm
±64 ppm to ±100 ppm frequency
offset, SEC_MSTR = 0, HMS = 1,
TIE_CLR = 1 and FASTLOCK=0
±64 ppm to ±100 ppm frequency
offset, SEC_MSTR = 1, HMS = 1,
TIE_CLR = 1 and FASTLOCK=0
±64 ppm to ±100 ppm frequency
offset, SEC_MSTR = 1, HMS = 1,
TIE_CLR = 1 and FASTLOCK=0
±64 ppm to ±100 ppm frequency
offset, HMS = 1, TIE_CLR = 1 and
FASTLOCK=1
TIE_CLR=1 and HMS=1
SEC_MSTR=0
SEC_MSTR=1
TIE_CLR=1
Notes
Data Sheet