zl30102 Zarlink Semiconductor, zl30102 Datasheet - Page 13

• Manufacturer Part Number: zl30102
• Description: T1/e1 Stratum 4/4e Redundant System Clock Synchronizer For Ds1/e1 And H.110
• Manufacturer: Zarlink Semiconductor

When the incoming signal returns to normal (REF_FAIL=0), the DPLL returns to Normal mode with the output
signal locked to the input signal. Each of the monitors has a built-in hysteresis to prevent flickering of the REF_FAIL
status pin at the threshold boundaries. The precise frequency monitor and the timer do not affect the mode
(Holdover/Normal) of the DPLL.
If the device is set to Automatic mode (MODE_SEL1:0=11), then the state machine does not immediately switch to
another reference. If the single cycle and/or coarse frequency failures persist for more than 2.5 s or the precise
frequency monitor detects a failure, then the state machine will switch to another valid reference if that is available.
If there no other reference available, it stays in Holdover mode.
The precise frequency monitor’s failure thresholds are selected with the OOR_SEL input based on the ZL30102
applications, Table 1. Figure 5 and Figure 6 show the out of range limits for various master clock accuracies. It will
take the precise frequency monitor up to 10 s to qualify or disqualify the input reference.
C20: 20 MHz master oscillator clock
REF0
dis/re-qualify
timer on REF0
REF_OOR0
(internal signal)
REF_FAIL0
HOLDOVER
REF_SEL
C20 Clock Accuracy
+32 ppm
-32 ppm
0 ppm
REF0
SCM or CFM failure
2.5 s
-115
-100
Figure 5 - DS1 Out-of-Range Thresholds for OOR_SEL=0
REF1
-96
-83
Figure 4 - Behaviour of the Dis/Re-qualify Timer
-75
-64
-50
-51
10 s
C20
-32
-32
Zarlink Semiconductor Inc.
-25
ZL30102
C20
0
0
13
25
C20
REF0
32
32
SCM or CFM failure
50
51
64
75
83
96
100
115
REF1
In Range
In Range
Out of Range
In Range
Frequency offset [ppm]
Out of Range
Out of Range
Data Sheet