tmc1175 Cadeka Microcircuits LLC., tmc1175 Datasheet
tmc1175
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tmc1175 Summary of contents
Page 1
... Internal voltage reference resistors allow self-bias operation. Input capacitance is very low, simplifying or eliminating input driving amplifiers. All digital three-state outputs are TTL- and CMOS-compatible. The TMC1175A is available in 24-lead plastic SOIC, and 28-lead J-lead PLCC packages. Performance specifications are guaranteed from -20°C to 75°C. Coarse ...
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... A/D quantizer output is gray-coded and converted to binary before it is combined with the coarse result to form a complete 8-bit result. Analog Input and Voltage References The TMC1175A converts analog signals in the range R R into digital data. Input signals outside that range produce T “ ...
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... The new data Output become valid CONV. FF The outputs of the TMC1175A are CMOS- and TTL-com- FE patible, and are capable of driving four low-power Schottky • • • TTL (54/74LS) loads. An Output Enable control, OE, places the outputs in a high-impedance state when HIGH. The out- 80 puts are enabled when OE is LOW ...
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... TMC1175A Analog input External Clock Upper comparators block Upper data Lower reference voltage Lower comparators A block Lower data A Lower comparators B block Lower data B Digital output Pin Assignments GND ...
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... LSB in 124ps. To limit the error (and noise) contribution due to aperture effects to 1/2LSB, the aperture must be shorter than 62ps. is the top input to the reference T defines the positive end T is the bottom input to the B defines the B conversion range. are enabled. 7-0 is sampled on the IN TMC1175A 5 ...
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... As long as the input circuit can slew and settle to the new value in the prescribed period, an accurate conver- sion will be made. The TMC1175A is capable of slewing a full 2V and settling between samples taken as little as 25ns apart, making it ideal for digitizing analog VGA and CCD outputs. ...
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... Applied voltage must be current limited to specified range. 3. Forcing voltage must be limited to specified range. 4. Current is specified as conventional current flowing into the device REV. 1.3.3 2/28/02 1 Min -0.5 GND -0.5 GND -0.5 DDD -0.5 GND -0.5 GND -10.0 -0.5 GND -10.0 -0.5 GND -6.0 -20 -65 TMC1175A Typ Max Unit 7.0 V 7.0 0 0.5 V DDD 10 0.5 V DDA 10 0.5 V DDD 6 ...
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... Power Supply Current DD I Power Supply Current, DDQ Quiescent P Total Power Dissipation D C Input Capacitance, Analog AI R Input Resistance IN 8 TMC1175A-20 TMC1175A-30 TMC1175A-40 TMC1175A-20 TMC1175A-30 TMC1175A-40 TMC1175A-20 TMC1175A-30 TMC1175A-40 V Conditions Max 35pF DDD DDA LOAD f = 20Msps 30Msps 40Msps ...
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... DDD -100µ -2.5mA Max Max OL = Nom, Minimum/Maximum values with V A Conditions C = 15pF LOAD C = 15pF LOAD TMC1175A 1 Min Typ Max Units ±1 µA Ω 200 270 340 ±5 µA ±5 µA ±5 µA ±5 µA - -0.3 ...
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... OB dg Differential Gain dp Differential Phase 3 SNR Signal-to-Noise Ratio 10 Conditions 0.6V RB TMC1175A-20 TMC1175A-30 TMC1175A-40 R – V for most positive code transition – V for most negative code transition 14.3Msps S NTSC 40 IRE Mod Ramp V = +5.0V, T =25°C DDA 2.6V 0.6V RT ...
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... 12.0MHz 40Msps 2.6V 0. 1.24MHz 2.48MHz 6.98MHz 10.0MHz 12.0MHz +5V and T = 25°C. DDD DDA A TMC1175A 1 Min Typ Max Units ...
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... Applications Discussion The circuit in Figure 12 employs a band-gap reference to generate a variable RT reference voltages for the TMC1175A as well as a bias voltage to offset the wideband input amplifier to mid-range. An "offset adjust" is also shown for varying the mid-range voltage level. The operational amplifier in the reference circuitry is a standard 741-type ...
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... The TMC1175A should be located near the board edge, close to the analog input connectors. 2. The power plane for the TMC1175A should be sepa- rate from that which supplies the rest of the digital cir- cuitry. A single power plane should be used for all of the V pins ...
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... Lead lengths should be minimized. Ceramic chip capacitors are the best choice the digital power supply has a dedicated power plane layer, it should not be placed under the TMC1175A, the voltage reference, or the analog inputs. Capacitive cou- pling of digital power supply noise from this layer to the TMC1175A and its related analog circuitry can have an adverse effect on performance ...
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... D E .205 .220 5.20 7.50 .295 .319 E1 e .050 BSC 1.27 BSC .010 .020 0.25 h .016 .050 0. α° ccc .004 - - REV. 1.3.3 2/28/02 Notes Max. 1.90 0.31 0.51 0.30 15.50 5.60 8.10 0.50 1. SEATING PLANE -C- LEAD COPLANARITY ccc 45° C α L TMC1175A 15 ...
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... TMC1175A Mechanical Dimensions 28 Lead PLCC Package Inches Millimeters Symbol Min. Max. Min. A .165 .180 4.19 A1 .090 .120 2.29 A2 .020 — .51 B .013 .021 .33 B1 .026 .032 .66 D/E .485 .495 12.32 D1/E1 .450 .456 11.43 D3/E3 .300 BSC 7.62 BSC e .050 BSC 1.27 BSC J .042 .048 1.07 ND/ ccc — .004 — ...
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... TMC1175A Ordering Information Conversion Product Number Rate TMC1175AM7C20 20 Msps TMC1175AM7C30 30 Msps TMC1175AM7C40 40 Msps TMC1175AR3C20 20 Msps TMC1175AR3C30 30 Msps TMC1175AR3C40 40 Msps Temperature Range Screening T = -20°C to 75°C Commercial -20°C to 75°C Commercial -20°C to 75°C Commercial -20°C to 75°C ...
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... Addendum 03/03/09 CADEKA Adds New Package Option TMC1175AW7C20 20 Msps 24 Lead SOIC, 0.300 Wide Body Package 45° α L For additional information regarding our products, please visit CADEKA at: CADEKA Headquarters Loveland, Colorado T: 970.663.5452 T: 877.663.5452 (toll free) CADEKA, the CADEKA logo design, COMLINEAR and the COMLINEAR logo design are trademarks or registered trademarks of CADEKA Microcircuits LLC ...