CDK2307 Cadeka Microcircuits LLC., CDK2307 Datasheet
CDK2307
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CDK2307 Summary of contents
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... The CDK2307 has a highly linear THA optimized for frequencies up to 70MHz. The differential clock interface is optimized for low jitter clock sources and supports LVDS, LVPECL, sine wave and CMOS clock inputs. ...
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... Data Sheet Pin Configuration QFN-64, TQFP- CDK2307 7 QFN-64, TQFP- DVSSCLK 13 14 DVDDCLK CLKP 15 CLKN 16 Pin Assignments Pin No. Pin Name Description 1, 18, 23 DVDD Digital and I/O-ring pre driver supply voltage, 1.8V 2 CM_EXT Common Mode voltage output AVDD Analog supply voltage, 1 ...
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Data Sheet Pin Assignments (Continued) Pin No. Pin Name Description 30 D1_4 Output Data Channel 1 31 D1_5 Output Data Channel 1 32 D1_6 Output Data Channel 1 33 D1_7 Output Data Channel 1 34 D1_8 Output Data Channel 1 ...
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Data Sheet Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper ...
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Data Sheet Electrical Characteristics (AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 20/40/65/80MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 13-bit output, unless otherwise noted) Symbol Parameter DC Accuracy No Missing Codes Offset Error ...
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... Data Sheet Electrical Characteristics - CDK2307A (AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 20MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 13-bit output, unless otherwise noted) Symbol Parameter Performance SNR Signal to Noise Ratio SINAD Signal to Noise and Distortion Ratio SFDR Spurious Free Dynamic Range ...
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... Data Sheet Electrical Characteristics - CDK2307B (AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 40MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 13-bit output, unless otherwise noted) Symbol Parameter Performance SNR Signal to Noise Ratio SINAD Signal to Noise and Distortion Ratio SFDR Spurious Free Dynamic Range ...
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... Data Sheet Electrical Characteristics - CDK2307C (AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 65MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 13-bit output, unless otherwise noted) Symbol Parameter Performance SNR Signal to Noise Ratio SINAD Signal to Noise and Distortion Ratio SFDR Spurious Free Dynamic Range ...
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... Data Sheet Electrical Characteristics - CDK2307D (AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 80MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 13-bit output, unless otherwise noted) Symbol Parameter Performance SNR Signal to Noise Ratio SINAD Signal to Noise and Distortion Ratio SFDR Spurious Free Dynamic Range ...
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Data Sheet Digital and Timing Electrical Characteristics (AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 50 MSPS clock, 50% clock duty cycle, -1 dBFS input signal, 5pF capacitive load, unless otherwise noted) Symbol Parameter Clock Inputs ...
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... Data Sheet CLK_EXT Recommended Usage Analog Input The analog input to the CDK2307 is done through a switched capacitor track-and-hold amplifier optimized for differential operation. Operation at mid supply common mode voltage is recommended even if performance will be good for the ranges specified. The CM_EXT pin pro- vides a voltage suitable for a common mode voltage refer- ence ...
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... Figure 6. Alternative Input Network Clock Input And Jitter Considerations Typically high-speed ADCs use both clock edges to generate internal timing signals. In the CDK2307 only the rising edge of the clock is used. Hence, input clock duty cycles between 20% and 80% are acceptable. The input clock can be supplied in a variety of formats. ...
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... The CDK2307 employs digital offset correction. This means that the output code will be 4096 with the positive and negative inputs shorted together(zero differential). How- ever, small mismatches in parasitics at the input can cause this to alter slightly ...
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Data Sheet Table 1: Data Format Description for 2V Differential Input Voltage (IPx - INx) 1.0 V +0.24mV -0.24mV -1.0V Reference Voltages The reference voltages are internally generated and buff- ered based on a bandgap voltage reference. No external decoupling ...
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Data Sheet Mechanical Dimensions QFN-64 Package aaa Pin 1 ID 0.05 Dia. 1.14 bbb 1.14 TOP VIEW D2 Pin 1 ID 0.45 Dia. 0. BOTTOM VIEW ©2009 CADEKA ...
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... CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties. Copyright ©2009 by CADEKA Microcircuits LLC. All rights reserved. Inches ...