ml87v2104 Oki Semiconductor, ml87v2104 Datasheet - Page 38

• Manufacturer Part Number: ml87v2104
• Description: Display Controller With Built-in Display Memory And Jpeg
• Manufacturer: Oki Semiconductor

2.7.2 Clock Generation
OKI Semiconductor
The system clock of the ML87V3116 uses x2, x4 or x8 of the pixel clock frequency of display output. This
clock generates the REFCLK input by a built-in PLL using simple integer ratio n/m (n and m are 1 to 255) as a
reference. (System clock = n/m
The clock for JPEG is generated by the frequency divider of another system, and can be operated even at a
slower speed than the system clock.
The system clock is distributed to internal modules. The clock for each module can control a clock enable
individually by register control, so that it can be used for the purpose of reducing power consumption.
REFCLK
mdiv
ndiv
1/N
1/M
•
REFCLK)
Figure 2.7.1 Clock Generation
Built-in
PLL
1/J
jdiv
1/L
ldiv
1/2
JPEG clock
System clock
Display output
pixel clock
: Register
PEDL87V3116-02
ML87V3116
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