ml87v2104 Oki Semiconductor, ml87v2104 Datasheet - Page 29

• Manufacturer Part Number: ml87v2104
• Description: Display Controller With Built-in Display Memory And Jpeg
• Manufacturer: Oki Semiconductor

2.6.2 Bus Control Signals
OKI Semiconductor
The assignment of the bus control signals to the input/output pins is determined by the host interface bus mode.
REGS
CSN
REN
WEN
WEHN
WELN
RWN
BSN
ASN
DSN
BSYN
ACK
BCLK
Pin name
AD15-00
A18-16
D07-00
REGS
BSYN
BCLK
WEN
CSN
REN
DSN
BSN
: Memory/register address space selection: “L”: Memory, “H”: Register
: Chip select (active “L”)
: Read enable (active “L”)
: Write enable (active “L”)
: Upper byte write enable (active “L”)
: Lower byte write enable (active “L”)
: Read/write selection: “L”: Write, “H”: Read
: Bus start (active “L”)
: Address strobe (active “L”)
: Data strobe (active “L”)
: Bus busy or wait, variable width according to wait time (active “L”)
: Data acknowledge, 1 clock width (active “L”)
: Bus clock
D07-00
A18-16
A15-00
REGS
BSYN
BCLK
WEN
CSN
REN
A0
—
—
Table-F5.5.1 Bus Control Signals
D07-00
A18-16
A15-00
REGS
BSYN
BCLK
WEN
CSN
REN
A1
BS
—
A18-16
A15-00
D07-00
REGS
BCLK
WEN
CSN
REN
BSN
ACK
A2
—
A18-16
A15-00
D07-00
Bus type
REGS
BCLK
RWN
CSN
BSN
ACK
A4
—
—
A18-16
A15-00
D07-00
REGS
BSYN
BCLK
RWN
CSN
BSN
A5
—
—
AD15-00
A18-16
WEHN
WELN
REGS
BSYN
BCLK
CSN
REN
ASN
B0
—
PEDL87V3116-02
ML87V3116
AD15-00
A18-16
WEHN
WELN
REGS
BSYN
BCLK
CSN
REN
AS
B1
—
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