ml7037 Oki Semiconductor, ml7037 Datasheet - Page 14

• Manufacturer Part Number: ml7037
• Description: Ml7037-003 Dual Echo Canceler & Noise Canceler With Dual Codec For Hands-free
• Manufacturer: Oki Semiconductor

Not for Publication
GPIB3 (NCTHR)
This is a general-purpose input port pin.
This also works as a through-mode control pin over the noise canceller as the secondary function.
A logic ‘0’ enables the noise canceller, and a logic ‘1’ disables the noise canceller and the speech data by-passes
the noise canceller.
When the MCUSEL pin is logic ‘1’, this pin is automatically assigned with its secondary function.
When the MCUSEL pin is logic ‘0’, this pin’s function assignment follows the state of GPFB3-bit [GPCR1-B3].
(Note) The change of the input state to this pin is detected at the rising edge of the SYNC clock so that the change
(Note) For 24ms approx. after the state change from a noise canceller enabling mode to a through-mode, the
(Note) If this pin is not used, set this pin to a logic ‘0’.
GPIB4 (ALCTHR)
This is a general-purpose input port pin.
This also works as a through-mode control pin over the automatic level controller (ALC) as the secondary
function.
A logic ‘0’ enables the ALC, and a logic ‘1’ disables the ALC and the speech data by-passes the ALC.
The ALC is a function to mainly aim to absorb the difference in speech volume with handsets to connect to a
hands-free. For the functional details, please refer to descriptions under the RALCTHR-bit [CR2-B4].
When the MCUSEL pin is logic ‘1’, this pin is automatically assigned with its secondary function.
When the MCUSEL pin is logic ‘0’, this pin’s function assignment follows the state of GPFB4-bit [GPCR1-B4].
(Note) The change of the input state to this pin is detected at the rising edge of the SYNC clock so that the change
(Note) If this pin is not used, set this pin to a logic ‘0’.
GPIB5 (SLPTHR)
This is a general-purpose input port pin.
This also works as a through-mode control pin over the slope filter as the secondary function.
A logic ‘0’ enables the slope filter, and a logic ‘1’ disables the slope filter and the speech data by-passes the slope
filter.
The slope filter has frequency characteristics to suppress low frequency range and gain high frequency range so
that it helps to relax near-end ambient noises usually dominant in low frequency range and to emphasize speech
consonants mostly dominant in high frequency range. For the functional details, please refer to the slope filter
characteristics under Reference Data.
When the MCUSEL pin is logic ‘1’, this pin is automatically assigned with its secondary function.
When the MCUSEL pin is logic ‘0’, this pin’s function assignment follows the state of GPFB5-bit [GPCR1-B5].
(Note) The change of the input state to this pin is detected at the rising edge of the SYNC clock so that the change
(Note) If this pin is not used, set this pin to a logic ‘0’.
GPIB6 (ECSEL)
This is a general-purpose input port pin.
This also works as an echo canceller selection as the secondary function.
A logic ‘0’ selects single echo canceller mode (enables only acoustic echo canceller), and a logic ‘1’ selects dual
echo canceller mode (enables both of acoustic and line echo cancellers).
When the MCUSEL pin is logic ‘1’, this pin is automatically assigned with its secondary function.
When the MCUSEL pin is logic ‘0’, this pin’s function assignment follows the state of GPFB6-bit [GPCR1-B6].
(Note) The change of the input state to this pin is detected at the rising edge of the SYNC clock so that the change
(Note) The single echo canceller mode should be selected in an environment where no line echoes exist.
(Note) The change of the input state of this pin must be made during power-down state (PDN pin = logic ‘0’ or
(Note) If this pin is not used, set this pin to a logic ‘0’.
OKI Semiconductor
of the input state to this pin less than 250 s may not be reflected as the LSI behavior.
speech signals may not be ordinarily processed and be got mute or attenuated. The state change, if needed,
is recommended to be made before a call.
of the input state to this pin less than 250 s may not be reflected as the LSI behavior.
of the input state to this pin less than 250 s may not be reflected as the LSI behavior.
of the input state to this pin less than 250 s may not be reflected as the LSI behavior.
SPDN-bit [CR0-B7] = ‘1’) or during initial mode.
PEDL7037-003-05Zz_Digest
ML7037-003
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