ispgal22v10av Lattice Semiconductor Corp., ispgal22v10av Datasheet - Page 14

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ispgal22v10av

Manufacturer Part Number
ispgal22v10av
Description
In-system Programmable Low Voltage E2 Cmos Pld Generic Array Logic ?
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
Switching Test Conditions
Figure 9 shows the output test load that is used for AC testing. The specific values for resistance, capacitance, volt-
age, and other test conditions are shown in Table 1.
Figure 9. Output Test Load, LVTTL and LVCMOS Standards
Table 1. Test Fixture Required Components
Pin Diagrams
LVCMOS I/O, (L -> H, H -> L)
LVCMOS I/O (Z -> H)
LVCMOS I/O (Z -> L)
LVCMOS I/O (H -> Z)
LVCMOS I/O (L -> Z)
1. C
2. Input conditions.
L
includes test fixtures and probe capacitance.
Test Condition
TMS
I
I
I
I
I
I
11
5
7
9
12
4
Top View
14
2
PLCC
I/O Standare
LVCMOS 3.3
LVCMOS 2.5
LVCMOS 1.8
28
16
DUT
26
18
25
23
21
19
I/O
I/O
I/O
TDO
I/O
I/O
I/O
106Ω 106Ω
106Ω 106Ω
106Ω 106Ω
106Ω
R
1
106Ω
R
V
R 1
R 2
2
14
CCO
35pF
35pF
35pF
5pF
5pF
C
TMS
Vcco
L
C L
1
I
I
I
I
I
I
1
4
5
8
32
Timing Ref.
9
ispGAL22V10AV/B/C Data Sheet
(V/B) 0.9V
(C) V
Input
1.5V
1.2V
Point
Test
CC
Top View
/2
29 28
QFN
12
2
13
Timing Ref.
Hi-Z + 0.3
Hi-Z - 0.3
V
V
Output
V
V
V
OL
OH
1.5V
CCO
CCO
CCO
+ 0.3
- 0.3
25
16
/2
/2
/2
24
21
20
17
I/O
I/O
I/O
TDO
GNDO
I/O
I/O
I/O
(V/B) 1.65V
(C) V
V
3.0V
2.3V
3.0V
3.0V
3.0V
3.0V
CCO
CC

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