ispgal22v10av Lattice Semiconductor Corp., ispgal22v10av Datasheet - Page 13

• Manufacturer Part Number: ispgal22v10av
• Description: In-system Programmable Low Voltage E2 Cmos Pld Generic Array Logic ?
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
f
Figure 8. ispGAL22V10AV/B/C f
MAX
fmax with External Feedback 1/(tsu+tco)
Note: fmax with no feedback may be less
than 1/twh + twl. This is to allow for a clock
duty cycle of other than 50%.
Descriptions
Note: fmax with external feedback is
calculated from measured tsu and tco.
L O G I C
A R R A Y
LOGIC
ARRAY
t
fmax with No Feedback
su +
t
s u
t
h
REGISTER
R EG I S T E R
CLK
C L K
MAX
Descriptions
t
c o
13
fmax with Internal Feedback 1/(tsu+tcf)
Note: tcf is a calculated value, derived by
subtracting tsu from the period of fmax
w/internal feedback (tcf = 1/fmax - tsu). The
value of tcf is used primarily when
calculating the delay from clocking a
register to a combinatorial output (through
registered feedback), as shown above. For
example, the timing from clock to a
combinatorial output is equal to tcf + tpd.
LOGIC
ARRAY
ispGAL22V10AV/B/C Data Sheet
t
cf
t
pd
REGISTER
CLK