clc2005 Cadeka Microcircuits LLC., clc2005 Datasheet - Page 11

• Manufacturer Part Number: clc2005
• Description: Dual, Low Cost, +2.7v To 5.5v, 260mhz Rail-to-rail Amplifer
• Manufacturer: Cadeka Microcircuits LLC.

Data Sheet
Figure 4: Overdrive Recovery
Driving Capacitive Loads
The Frequency Response vs. C
the response of the CLC2005. A small series resistance
(R
will improve stability and settling performance. R
in the Frequency Response vs. C
achieve maximum bandwidth with less than 1dB of peak-
ing. For maximum flatness, use a larger R
Figure 5: Typical Topology for driving a capacitive load
Layout Considerations
General layout and supply bypassing play major roles
in high frequency performance. Cadeka has evaluation
boards to use as a guide for high frequency layout and to
aid in device testing and characterization. Follow the steps
below as a basis for high frequency layout:
n
n
n
n
n
©2004-2008 CADEKA Microcircuits LLC
Include 6.8μF and 0.1μF ceramic capacitors
Place the 6.8μF capacitor within 0.75 inches of the
power pin
Place the 0.1μF capacitor within 0.1 inches of the
power pin
Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
Minimize all trace lengths to reduce series inductances
s
) at the output of the amplifier, illustrated in Figure 5,
R
g
+
-
Input
R
f
Time (20ns/div)
R
L
s
plot on page 6, illustrates
L
plot were chosen to
C
Output
L
R
V
G = 5
R
in
L
f
= 1kΩ
= 2kΩ
=2V
s
R
.
pp
L
s
values
Refer to the evaluation board layouts shown in Figure 7
for more information.
When evaluating only one channel, complete the following
on the unused channel:
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of this device:
Evaluation board schematics and layouts are shown in
Figure 6 and Figure 7.
The CEB006 evaluation board is built for dual supply
operation. Follow these steps to use the board in a single
supply application:
Figure 6: Evaluation Board Schematic
Eval Board
CEB006
1. Ground the non-inverting input.
2. Short the output to the inverting input.
1. Short -V
2. Use C3 and C4, if the -V
not directly connected to the ground plane.
s
to ground.
Description
Dual Channel, Dual Supply
8 lead SOIC
s
pin of the CLC2005 is
www.cadeka.com
Products
CLC2005SO8
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