ht82a523r Holtek Semiconductor Inc., ht82a523r Datasheet - Page 8

• Manufacturer Part Number: ht82a523r
• Description: Ht82a523r -- Usb 2.0 Full Speed 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

Only the destination of the lower-order byte in the table
is well-defined, the other bits of the table word are trans-
ferred to the lower portion of TBLH. The Table
Higher-order byte register (TBLH) is read only and can-
not be restored. The table pointer (TBLP, TBHP) is a
read/write register (07H, 1FH), which indicates the table
location. Before accessing the table, the location must
be placed in the TBLP and TBHP registers(If the config-
uration option TBHP is disabled, the value in TBHP has
no effect).
If the main routine and the ISR (Interrupt Service Rou-
tine) both employ the table read instruction, the contents
of the TBLH in the main routine is likely to be changed by
the table read instruction used in the ISR. As a result er-
rors may occur. In other words, using the table read in-
struction in the main routine and in the ISR
simultaneously should be avoided. However, if the table
read instruction has to be applied in both the main rou-
tine and the ISR, the interrupt should be disabled prior to
the table read instruction.
It will not be enabled until the TBLH has been backed
up. All table related instructions require two cycles to
complete the operation. These areas may function as
normal program memory depending on the require-
ments.
Once TBHP is enabled, the instruction TABRDC [m]
reads the ROM data as defined by TBLP and TBHP reg-
ister value. Otherwise, if the configuration option TBHP
is disabled, the instruction TABRDC [m] reads the
ROM data as defined by TBLP and the current program
counter bits.
Stack Register - STACK
This is a special part of the memory which is used to
save the contents of the Program Counter only. The
stack is organized into 6 levels and is neither part of the
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor writeable.
At a subroutine call or an interrupt acknowledgment, the
contents of the program counter are pushed onto the
stack. At the end of the subroutine or an interrupt rou-
tine, signaled by a return instruction (RET or RETI), the
program counter is restored to its previous value from
the stack. After a chip reset, the SP will point to the top of
the stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag will be recorded but the
acknowledgment will be inhibited. When the stack
pointer is decremented (by RET or RETI), the interrupt is
serviced. This feature prevents stack overflow, allowing
the programmer to use the structure more easily. If the
stack is full and a CALL is subsequently executed,
stack overflow occurs and the first entry will be lost (only
the most recent 6 return addresses are stored).
Rev. 1.30
8
Data Memory - RAM
The data memory (RAM) is designed with 235 8 bits,
RAM Mapping
HT82A523R
May 13, 2008