zl2005 Intersil Corporation, zl2005 Datasheet - Page 34

• Manufacturer Part Number: zl2005
• Description: Digital-dc? Integrated Power Management And Conversion Ic
• Manufacturer: Intersil Corporation

Using this method, the user can theoretically configure
up to 625 unique SMBus addresses, however the
SMBus is inherently limited to 128 devices so
attempting to configure an address higher than 128
will cause the device address to repeat (i.e, attempting
to configure a device address of 129 would result in a
device address of 1). Therefore, the user should use
index values 0-4 on the SA1 pin and the full range of
index values on the SA0 pin, which will provide 125
device address combinations.
Table 27. SMBus Address Index Values
6.10 Phase Spreading
When multiple point of load converters share a com-
mon DC input supply, it is desirable to adjust the clock
phase offset of each device such that not all devices
start to switch simultaneously. Setting each converter
to start its switching cycle at a different point in time
can dramatically reduce input capacitance require-
ments and efficiency losses. Since the peak current
drawn from the input supply is effectively spread out
over a period of time, the peak current drawn at any
given moment is reduced and the power losses propor-
tional to the I
In order to enable phase spreading, all converters must
be synchronized to the same switching clock. The
CFG pin is used to set the configuration of the SYNC
pin for each device as described in Section 5.7,
“Switching Frequency and PLL,” .
SA1 Index
SA0 or
10
11
12
0
1
2
3
4
5
6
7
8
9
RMS
12.1 kΩ
13.3 kΩ
14.7 kΩ
16.2 kΩ
17.8 kΩ
19.6 kΩ
21.5 kΩ
23.7 kΩ
26.1 kΩ
28.7 kΩ
31.6 kΩ
10 kΩ
11 kΩ
2
R
are reduced dramatically.
SA
34
SA0 or
Index
SA1
13
14
15
16
17
18
19
20
21
22
23
24
34.8 kΩ
38.3 kΩ
42.2 kΩ
46.4 kΩ
51.1 kΩ
56.2 kΩ
61.9 kΩ
68.1 kΩ
82.5 kΩ
90.9 kΩ
100 kΩ
75 kΩ
R
SA
ZL2005
Selecting the phase offset for the device is accom-
plished by selecting a device address according to the
following equation:
Phase offset = device address x 45°
For example:
The phase offset of each device may also be set to any
value between 0° and 337.5° in 22.5° increments via
the I
Note AN13 for details.
6.11 Output Sequencing
A group of ZL2005 devices may be configured to
power up in a predetermined sequence. This feature is
especially useful when powering advanced processors,
FPGAs, and ASICs that require one supply to reach its
operating voltage prior to another supply reaching its
operating voltage.
achieved by configuring each device through the I
SMBus interface or by using Zilker Labs’ patented
autonomous sequencing mode.
Autonomous sequencing mode configures sequencing
using status information broadcast by ZL2005 onto the
I
host device is involved in this method, but the SCL
and SDA pins must be interconnected between all
devices that the user wishes to sequence using this
method. Note: Pull-up resistors on SCL and SDA are
required and should be selected using the criteria in
the SMBus 2.0 specification.
The sequence order is determined using each device’s
I
sequencing mode (configured using the CFG pin), the
devices must exhibit sequential device addresses with
no missing addresses in the chain. This mode will also
constrain each device to have a phase offset according
to its device address as described in Section 6.10,
“Phase Spreading” on this page.
2
2
C/SMBus pins SCL and SDA. No I
C/SMBus device address.
2
A device address of 0x00 or 0x20 would config-
ure no phase offset
A device address of 0x01 or 0x21 would config-
ure 45° of phase offset
A device address of 0x02 or 0x22 would config-
ure 90° of phase offset.
C/SMBus interface. Please refer to Application
Multi-device sequencing can be
Using autonomous
2
C or SMBus
February 18, 2009
FN6848.0
2
C/