zl2005 Intersil Corporation, zl2005 Datasheet - Page 26

• Manufacturer Part Number: zl2005
• Description: Digital-dc? Integrated Power Management And Conversion Ic
• Manufacturer: Intersil Corporation

Once the sensing method has been selected, the user
must select the voltage threshold (V
equation 26, the desired current limit threshold, and
the resistance of the sensing element.
The current limit threshold can be selected by simply
connecting the ILIM0 and ILIM1 pins as shown in
Table 19. The ground-referenced sensing method is
being used in this mode.
Table 19. Current Limit Threshold Voltage Settings
The threshold voltage can also be selected in 5 mV
increments by connecting a resistor, R
the ILIM0 pin and ground according to Table 20. This
method is preferred if the user does not desire to use or
does not have access to the I
the desired threshold value is contained in Table 20.
Table 20. Current Limit Threshold Voltage Settings
The current limit threshold can be set via the I
SMBus interface. Please refer to Application Note
AN13 for further details on setting current limit
parameters.
ILIM1
10 mV
15 mV
20 mV
25 mV
30 mV
35 mV
40 mV
45 mV
50 mV
0 mV
5 mV
V
LIM
OPEN
HIGH
LOW
12.1 kΩ
13.3 kΩ
14.7 kΩ
16.2 kΩ
17.8 kΩ
19.6 kΩ
21.5 kΩ
23.7 kΩ
26.1 kΩ
10 kΩ
11 kΩ
R
LIM0
20 mV
50 mV
80 mV
LOW
26
2
100 mV
C/SMBus interface and
55 mV
60 mV
65 mV
70 mV
75 mV
80 mV
85 mV
90 mV
95 mV
V
LIM
ILIM0
OPEN
30 mV
60 mV
90 mV
LIM
LIM0
) based on
28.7 kΩ
31.6 kΩ
34.8 kΩ
38.3 kΩ
42.2 kΩ
46.4 kΩ
51.1 kΩ
56.2 kΩ
61.9 kΩ
68.1 kΩ
R
, between
100 mV
HIGH
40 mV
70 mV
LIM0
2
C/
ZL2005
5.10 Loop Compensation
The ZL2005 operates as a voltage-mode synchronous
buck controller with a fixed frequency PWM scheme.
Although the ZL2005 uses a digital control loop, it
operates much like a traditional analog PWM control-
ler. See Figure 15 for a simplified block diagram of the
ZL2005 control loop, which differs from an analog
control loop by the constants in the PWM and com-
pensation blocks. As in the analog controller case, the
compensation block compares the output voltage to
the desired voltage reference and compensation zeros
are added to keep the loop stable. The resulting inte-
grated error signal is used to drive the PWM logic,
converting the error signal into a duty cycle value to
drive the external MOSFETs.
In the ZL2005, the compensation zeros are set by con-
figuring the FC0 and FC1 pins or via the I
interface once the user has calculated the required set-
tings. This method eliminates the inaccuracies due to
the component tolerances associated with using exter-
nal resistors and capacitors. Most applications can be
served by using the pin-strap compensation settings
listed in Table 21. These settings will yield a conserva-
tive crossover frequency at a fixed fraction of the
switching frequency (f
Figure 15. Control Loop Block Diagram
DPWM
1-D
D
Compensation
Sw
V
/20) and 60° of phase margin.
IN
L
R
C
C
R
O
February 18, 2009
2
V
C/SMBus
OUT
FN6848.0