zl2005 Intersil Corporation, zl2005 Datasheet - Page 27

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zl2005

Manufacturer Part Number
zl2005
Description
Digital-dc? Integrated Power Management And Conversion Ic
Manufacturer
Intersil Corporation
Datasheet

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Table 21. Pin-Strap Setting for Loop Compensation
Step 1: Using the following equation, calculate the
resonant frequency of the LC filter, f
Step 2: Based on Table 21, determine the FC0 setting.
Step 3: Calculate the ESR zero frequency (f
Step 4: Based on Table 21, determine the FC1 setting.
The parameters of the feedback compensation can also
be set using the I
cation Note AN13 for details.
Refer to Application Note AN16 for details on setting
FC0 and FC1.
The Zilker Labs web site (www.zilkerlabs.com) pro-
vides an on-line tool (PowerPilot) which computes
compensation coefficients, and provides a parameter-
driven design tool, schematic and BOM generation,
and circuit simulation including control loop simula-
tion.
f
f
sw
sw
f
f
f
sw
zesr
n
/240 < f
/120 < f
=
/60 < f
FC0 Range
=
------------------------
2 π L C
----------------- -
2 πCRc
n
n
n
1
1
< f
< f
< f
×
2
C/SMBus interface. Refer to Appli-
sw
sw
sw
/30
/120
/60
27
FC0 Pin
OPEN
HIGH
LOW
n
.
(27)
(28)
ZESR
).
ZL2005
f
f
f
sw
sw
sw
5.11 Non-Linear Response Settings
The ZL2005 incorporates a non-linear response (NLR)
loop that decreases the response time and the output
voltage deviation in the event of a sudden output load
current step. The NLR loop incorporates a secondary
error signal processing path that bypasses the primary
error loop when the output begins to transition outside
of the standard regulation limits. This scheme results
in a higher equivalent loop bandwidth than is possible
using a traditional linear loop.
When a load current step function imposed on the out-
put causes the output voltage to drop below the lower
regulation limit, the NLR circuitry will force a positive
correction signal that will turn on the upper MOSFET
and quickly force the output to increase. Conversely, a
negative load step (i.e., removing a large load current)
will cause the NLR circuitry to force a negative cor-
rection signal that will turn on the lower MOSFET and
quickly force the output to decrease.
The ZL2005 has been pre-configured with appropriate
NLR settings that correspond to the loop compensa-
tion settings in Table 21.
/10 > f
/10 > f
/10 > f
f
f
f
FC1 Range
zesr
zesr
zesr
TBD
TBD
TBD
> f
> f
> f
zesr
zesr
zesr
sw
sw
sw
> f
> f
> f
/10
/10
/10
sw
sw
sw
/30
/30
/30
FC1 Pin
OPEN
OPEN
OPEN
HIGH
HIGH
HIGH
LOW
LOW
LOW
February 18, 2009
FN6848.0

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