wm8802scft/v Wolfgang Knap, wm8802scft/v Datasheet - Page 45

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wm8802scft/v

Manufacturer Part Number
wm8802scft/v
Description
Digital Audio Interface Transceiver
Manufacturer
Wolfgang Knap
Datasheet
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REGISTER ADDRESS
Command address: 4
CCB address: 0xE8;
S system output clock setting:
XSLRCK1
PSBCK [1:0]
PSLRCK [1:0]
XSBCK [1:0]
XSLRCK [1:0]
DI15
DI7
0
XSLRCK0
DI14
DI6
1
XSBCK1
SBCK frequency setting during PLL lock
00: 64fs output (initial value)
01: 128fs output
10: 32fs output
11: Muted
SLRCK frequency setting during PLL lock
00: fs output (initial value)
01: 2fs output
10: fs/2 output
11: Muted
SBCK frequency setting during XIN source
00: 3.072MHz output (initial value)
01: 6.144MHz output
10: 12.288MHz output
11: Muted
SLRCK frequency setting during XIN source
00: 48kHz output (initial value)
01: 96kHz output
10: 192kHz output
11: Muted
DI13
DI5
0
XSBCK0
DI12
DI4
0
PSLRCK1
DI11
DI3
0
PSLRCK0
DI10
DI2
0
PSBCK1
PP Rev 1.1 April 2004
CAU
DI1
DI9
WM8802
PSBCK0
CAL
DI0
DI8
45

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