wm8351 Wolfson Microelectronics plc, wm8351 Datasheet - Page 217

• Manufacturer Part Number: wm8351
• Description: Wolfson Audioplus? Stereo Codec With Power Management
• Manufacturer: Wolfson Microelectronics plc

Production Data
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R211 (D3h) LDO4 Low Power
R215 (D7h) VCC_FAULT Masks
R216 (D8h) Main Bandgap Control
R217 (D9h) OSC Control
R218 (DAh) RTC Tick Control
R219 (DBh) Security1
R234 (EAh) FLL Test 1
R250 (FAh) DCDC3 Test Controls
R251 (FBh) DCDC4 Test Controls
R224 (E0h) Signal overrides
R225 (E1h) DCDC/LDO status
R226 (E2h) Charger Overides/status
R227 (E3h) misc overrides
R228 (E4h) Supply overrides/status 1
R229 (E5h) Supply overrides/status 2
R230 (E6h) GPIO Pin Status
R231 (E7h) comparotor overrides
R233 (E9h) State Machine status
R248 (F8h) DCDC1 Test Controls
REG
NAME
MBG_LOAD
OSC_LOAD
_FUSES (K)
RTC_TICK_
_HOT_OVR
ENA (KMs)
LS_STS (s)
CHG_BATT
OVCR_LS_
USB_FB_O
LS_FAULT
_FUSES
OVRDE
VRDE
1 (n)
15
DE
(s)
0
0
0
0
0
0
0
0
0
RTC_TICKS
CHG_BATT
_COLD_OV
WALL_FB_
OVRDE
TS (K)
RDE
1 (n)
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RTC_CLKS
BATT_FB_
RC (KMs)
LDO4_HIB_MODE[1:0]
OVRDE
1 (n)
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(Ms)
REG_OVRD
FLL_FRC_T
OSC32K_E
CS1_NOT_
RK_GAIN (K)
GP12_LVL GP11_LVL GP10_LVL
NA (KMs)
12
0
0
0
0
0
0
E
0
0
0
0
0
0
0
K_DET_L_O
CHG_END_
UNDV_LDO
CODEC_JC
LDO4_FAU
WALL_FB_
GT_BATT_
LDO4_STS
4_OVRDE
OVRDE
OVRDE
VRDE
LT (s)
11
(s)
0
0
0
0
0
0
0
0
0
0
0
USB_FB_G
UNDV_LDO
CODEC_JC
LDO3_FAU
T_BATT_O
LDO3_STS
USB_LIMIT
K_DET_R_
3_OVRDE
_OVRDE
OVRDE
LT (s)
VRDE
10
(s)
0
0
0
0
0
0
0
0
0
0
USB_SM[2:0]
UNDV_LDO
CSCD_OVR
LDO2_FAU
CODEC_MI
FLL_OK_O
LDO2_STS
2_OVRDE
GP9_LVL
LDO4_HIB_TRIG[1:0]
LT (s)
VRDE
FLL_BIAS[1:0] (K)
DE
9
(s)
0
0
0
0
0
0
0
0
(Ms)
DEB_TICK_
UNDV_LDO
CD_OVRDE
LDO1_FAU
LDO1_STS
CODEC_MI
1_OVRDE
GP8_LVL
OVRDE
SECURITY[15:0] (s)
LT (s)
8
(s)
0
0
0
0
0
0
0
0
MP4_OVRD
UVLO_B_O
AUX_DCO
GP7_LVL
FLL_POLE_SHIFT[1:0]
VRDE
7
E
0
0
0
0
0
0
0
0
0
0
0
0
0
(K)
MP3_OVRD
RTC_ALAR
M_OVRDE
AUX_DCO
GP6_LVL
6
E
0
0
0
0
0
0
0
0
0
0
0
0
CHG_SM[2:0]
MP2_OVRD
AUX_DCO
GP5_LVL
RTC_TRIM[9:0] (K)
5
0
0
0
0
0
0
0
E
0
0
0
0
0
0
0
MP1_OVRD
DC1_FORC
DC3_FORC
DC4_FORC
E_PWM (s)
E_PWM (s)
E_PWM (s)
AUX_DCO
GP4_LVL
4
E
0
0
0
0
0
0
0
0
0
0
O_OK_OVR
LINE_GT_B
ATT_OVRD
HYST_UVL
OVRV_DC4
UNDV_DC4
DC4_FAUL
DC4_STS
GP3_LVL
_OVRDE
_OVRDE
T (s)
3
DE
(s)
E
0
0
0
0
0
0
0
0
LDO4_VIMG[4:0]
LINE_GT_V
RTC_OVRD
CHIP_GT11
OVRV_DC3
DC3_FAUL
CHG_BATT
_LT_3P9_O
UNDV_DC3
5_OVRDE
DC3_STS
GP2_LVL
_OVRDE
_OVRDE
VRDE
T (s)
2
(s)
0
0
E
0
0
0
0
0
MAIN_SM[3:0]
USB_GT_LI
NE_OVRDE
CHG_BATT
_LT_3P1_O
CHIP_GT14
UNDV_DC2
DC2_FAUL
DC2_STS
0_OVRDE
GP1_LVL
_OVRDE
VRDE
T (s)
1
(s)
0
0
0
0
0
0
0
0
PD, June 2009, Rev 4.1
USB_OVRD
CHG_BATT
OVRV_DC1
UNDV_DC1
DC1_FAUL
BATT_GT_
_LT_2P85_
DC1_STS
_OVRDE
_OVRDE
GP0_LVL
OVRDE
T (s)
0
(s)
E
0
0
0
0
0
0
0
0
WM8351
DEFAULT
001Ch
E000h
0000h
001Fh
0000h
9000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
1200h
1000h
1000h
1000h
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