wm8351 Wolfson Microelectronics plc, wm8351 Datasheet - Page 212

• Manufacturer Part Number: wm8351
• Description: Wolfson Audioplus? Stereo Codec With Power Management
• Manufacturer: Wolfson Microelectronics plc

WM8351
w
R106 (6Ah) OUT2L Volume
R107 (6Bh) OUT2R Volume
R100 (64h) Input Mixer Volume
R104 (68h) OUT1L Volume
R105 (69h) OUT1R Volume
R111 (6Fh) BEEP Volume
R112 (70h) AI Formating
R113 (71h) ADC DAC COMP
R114 (72h) AI ADC Control
R115 (73h) AI DAC Control
R76 (4Ch) Output Control
R77 (4Dh) Jack Detect
R78 (4Eh) Anti Pop Control
R92 (5Ch) OUT3 Mixer Control
R93 (5Dh) OUT4 Mixer Control
R80 (50h) Left Input Volume
R81 (51h) Right Input Volume
R88 (58h) Left Mixer Control
R89 (59h) Right Mixer Control
R96 (60h) Output Left Mixer Volume
R97 (61h) Output Right Mixer Volume
R98 (62h) Input Mixer Volume L
R99 (63h) Input Mixer Volume R
REG
NAME
IN3R_TO_O
AIF_BCLK_I
MIXOUTR_
OUT3_ENA
OUT4_ENA
OUT4_MIXI
OUT1L_EN
OUT1R_EN
OUT2L_EN
OUT2R_EN
MIXOUTL_
JDL_ENA
INR_ENA
INL_ENA
N_DST
UT2R
ENA
ENA
15
NV
A
A
A
A
0
0
0
0
0
0
0
IN3R_MIXOUTR_VOL[2:0]
IN3R_MIXINR_VOL[2:0]
OUT1L_MU
OUT1R_MU
OUT2L_MU
OUT2R_MU
BCLK_MST
INR_MUTE
INL_MUTE
JDR_ENA
14
TE
TE
TE
TE
R
0
0
0
0
0
0
0
0
0
0
0
0
0
OUT1R_ZC
OUT2R_ZC
OUT1L_ZC
OUT2L_ZC
INR_ZC
AIF_TRI
INL_ZC
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DACR_TO_
DACR_TO_
DACR_TO_
AIF_LRCLK
MIXOUTR
MIXOUTL
OUT4
_INV
12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OUT4_VROI OUT3_VROI OUT2_VROI OUT1_VROI
DACL_TO_
DACL_TO_
DACL_TO_
DACL_TO_
MIXOUTR
MIXOUTL
OUT3
OUT4
11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IN3L_MIXOUTL_VOL[2:0]
AIF_WL[1:0]
IN3L_MIXINL_VOL[2:0]
OUT2R_INV OUT2R_INV
OUT4_ATT
10
N
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MIXINR_TO
_MUTE
_OUT4
9
ANTI_POP[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AIF_FMT[1:0]
MIXINL_TO
OUT1_VU
OUT1_VU
OUT2_VU
OUT2_VU
_OUT3
IN_VU
IN_VU
8
0
0
0
0
0
0
0
0
0
0
0
0
0
AIFADC_PD AIFADCL_S
AIFDAC_PD DACL_SRC DACR_SRC AIFDAC_TD
DAC_COM
DIS_OP_LN4[1:0]
7
0
0
0
0
0
0
0
0
0
P
INR_MIXOUTR_VOL[2:0]
INR_MIXOUTL_VOL[2:0]
IN2R_MIXINR_VOL[2:0]
IN3R_OUT2R_VOL[2:0]
DAC_COM
PMODE
6
RC
0
0
0
0
0
0
0
0
0
AIFADCR_S
ADC_COM
DIS_OP_LN3[1:0]
OUT1L_VOL[5:0]
OUT1R_VOL[5:0]
OUT2L_VOL[5:0]
OUT2R_VOL[5:0]
RC
5
P
0
0
0
0
0
0
0
0
0
INR_VOL[5:0]
INL_VOL[5:0]
AIFADC_TD
OUTPUT_D
RAIN_ENA
ADC_COM
M_CHAN
M_CHAN
PMODE
4
0
0
0
0
0
0
0
0
0
0
0
0
IN3R_TO_M
AIFADC_TD
AIFDAC_TD
OUT4_TO_
IXOUTR
DIS_OP_OUT2[1:0]
OUT3
3
M
M
0
0
0
0
0
0
0
0
INL_MIXOUTL_VOL[2:0]
INL_MIXOUTR_VOL[2:0]
IN2L_MIXINL_VOL[2:0]
OUT4_MIXIN_VOL[2:0]
IN3L_TO_M
OUT3_TO_
OUT2_FB
IXOUTL
OUT4
2
0
0
0
0
0
0
0
0
0
INR_TO_MI
INR_TO_MI
MIXOUTR_
TO_OUT4
XOUTL
XOUTR
DIS_OP_OUT1[1:0]
DAC_BOOST[1:0]
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PD, June 2009, Rev 4.1
MIXOUTL_T
MIXOUTL_T
INL_MIXINL
LOOPBACK
INL_TO_MI
INL_TO_MI
INR_MIXIN
OUT1_FB
O_OUT3
O_OUT4
XOUTL
XOUTR
R_VOL
_VOL
0
Production Data
0
0
0
0
0
0
0
0
0
0
0
0
0
DEFAULT
00E4h
00E4h
00E4h
02E4h
0A00h
0000h
0000h
0000h
0040h
0040h
0800h
1000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0020h
0020h
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