wm9714l Wolfson Microelectronics plc, wm9714l Datasheet - Page 21

• Manufacturer Part Number: wm9714l
• Description: Ac?97 Audio Codec
• Manufacturer: Wolfson Microelectronics plc

Pre-Production
w
Clock mode and division ratios are controlled by register 44h as shown in Table 3.
Table 3 Clock Muxing and Division Control
44h
REGISTER
ADDRESS
14:12
11:8
7
5:3
2
1
0
BIT
S
S
CLKSRC
PENDIV
CLKBX2
CLKAX2
CLKMUX
EXT
EXT
LABEL
[6:4]
[3:0]
000 (div 1)
0000 (div 1)
1 (ext clk)
000 (div 16)
0 (Off)
0 (Off)
0 (MCLKA)
DEFAULT
Defines clock division ratio for Hi-fi:
DSP, ADCs and DACs
000: f
001: f/2
...
111: f/8
Defines clock division ratio for PCM
interface and voice DAC in external clock
mode only:
0000: f
0001: f/2
…
1111: f/16
Selects between PLL clock and External
clock
0: PLL clock
1: external clock
Sets AUXADC clock divisor
000: f/16
001: f/12
010: f/8
011: f/6
100: f/4
101: f/3
110: f/2
111: f
Clock doubler for MCLKB
Clock doubler for MCLKA
Selects between MCLKA and MCLKB
(N.B. On power-up clock must be present
on MCLKA and must be active for 2 clock
cycles after switching to MCLKB)
0: SYSCLK=MCLKA
1: SYSCLK=MCLKB
DESCRIPTION
PP, Rev 3.2, October 2008
WM9714L
21