wm9714l Wolfson Microelectronics plc, wm9714l Datasheet - Page 108

• Manufacturer Part Number: wm9714l
• Description: Ac?97 Audio Codec
• Manufacturer: Wolfson Microelectronics plc

76h
78h
WM9714L
Registers 76h controls the AUXADC measurement timing.
Register 78h control the physical properties of the AUXADC.
w
REGISTER
REGISTER
ADDRESS
ADDRESS
9:8
7:4
3
2:0
15:14
9
7:6
BIT
BIT
CR
DEL
SLEN
SLT
PRP
WAIT
MSK
LABEL
LABEL
00 (93.75Hz)
0000 (20.8µs)
1
110 (slot 11)
00
0
00 (disabled)
DEFAULT
DEFAULT
Continuous Mode Conversion Rate
DEL < 1111
00 = 93.75Hz
01 = 120Hz
10 = 153.75kHz
11 = 187.5Hz
AUXADC Settling Time Control
0000 = 1 AC-link frame (20.8µs)
0001 = 2 AC-link frames (41.7µs)
0010 = 4 AC-link frames (83.3µs)
0011 = 8 AC-link frames (167µs)
0100 = 16 AC-link frames (333µs)
0101 = 32 AC-link frames (667µs)
0110 = 48 AC-link frames (1ms)
0111 = 64 AC-link frames (1.33ms)
1000 = 96 AC-link frame (2ms)
1001 = 128 AC-link frames (2.67ms)
1010 = 160 AC-link frames (3.33ms)
1011 = 192 AC-link frames (4ms)
1100 = 224 AC-link frames (4.67ms)
1101 = 256 AC-link frames (5.33ms)
1110 = 288 AC-link frames (6ms)
1111 = No delay, switch matrix always on
Slot Readback Enable Control
0 = Disabled (readback through register map only)
1 = Enabled (readback slot selected by SLT)
AC’97 Slot for AUXADC Data Control
000 = Slot 5
001 = Slot 6
010 = Slot 7
011 = Slot 8
100 = Slot 9
101 = Slot 10
110 = Slot 11
111 = Reserved
Additional Enable for AUXADC
00 = Disabled
01 = Reserved
10 = Reserved
11 = Enabled
AUXADC Data Control
0 = Overwrite existing data in 7Ah with new data
1 = Retain existing data in 7Ah until it is read
Mask Input Control
00 = Disabled
01 = Static
10 = Edge-triggered
11 = Synchronous
DESCRIPTION
DESCRIPTION
DEL = 1111
00 = 8kHz
01 = 12kHz
10 = 24kHz
11 = 48kHz
PP, Rev 3.2, October 2008
Pre-Production
AUXADC
AUXADC
REFER TO
REFER TO
108