wm8595 Wolfson Microelectronics plc, wm8595 Datasheet - Page 48

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wm8595

Manufacturer Part Number
wm8595
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet

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WM8595
GLOBAL ENABLE CONTROL
w
Table 39 describes the various bias control bits for power up/down control:
The WM8595 includes a number of enable and disable mechanisms to allow the device to be
powered on and off in a pop-free manner. A global enable control bit enables the ADC, DAC and
analogue paths.
Table 39 Bias Control
Table 40 Global Enable Control
REGISTER
REGISTER
ADDRESS
ADDRESS
ENABLE
BIAS
R35
R12
0Ch
23h
BIT
BIT
7:6
0
0
1
2
3
4
5
GLOBAL_
POBCTRL
VMIDTOG
FAST_EN
SOFT_ST
BIAS_EN
SEL[1:0]
LABEL
BUFIO_
LABEL
VMID_
EN
EN
DEFAULT
DEFAULT
00
0
0
0
0
1
0
0
Bias Source for Output Amplifiers
0 = Output amplifiers use master bias
1 = Output amplifiers use fast bias
VMID Power Down Characteristic
0 = Slow ramp
1 = Fast ramp
Fast Bias Enable
0 = Fast bias disabled
1 = Fast bias enabled
VMID Buffer Enable
0 = VMID Buffer disabled
1 = VMID Buffer enabled
VMID Soft Ramp Enable
0 = Soft ramp disabled
1 = Soft ramp enabled
Master Bias Enable
0 = Master bias disabled
1 = Master bias enabled
Also powers down VMID1C
VMID Resistor String Value Selection
(VMID2C only)
00 = off (no VMID)
01 = 38k
10 = 127k
11 = 12.5k
The selection is the total resistance of the
string from VREF2VDD to VREF2GND. The
VMID1C resistance is fixed at 200kΩ.
Device Global Enable
0 = ADC, DAC and PGA ramp control
circuitry disabled
1 = ADC, DAC and PGA ramp control
circuitry enabled
DESCRIPTION
DESCRIPTION
PD, Rev 4.1, April 2010
Production Data
48

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