wm8595 Wolfson Microelectronics plc, wm8595 Datasheet - Page 20
wm8595
Manufacturer Part Number
wm8595
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8595.pdf
(81 pages)
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WM8595
3-WIRE (SPI COMPATIBLE) SERIAL CONTROL INTERFACE MODE
w
REGISTER WRITE
SDA is used for the program data, SCLK is used to clock in the program data and CS
in the program data. SDA is sampled on the rising edge of SCLK. The 3-wire interface write protocol
is shown in Figure 11.
Figure 11 3-Wire Serial Interface Write Protocol
REGISTER READ-BACK
The read-only status registers can be read back via the SDOUT pin. Read Back is enabled when the
R/W bit is high. The data can then be read by writing to the appropriate register address, to which the
device will respond with data.
Figure 12 3-Wire Serial Interface Readback Protocol
REGISTER RESET
Any write to register R0 (00h) will reset the WM8595. All register bits are reset to their default values.
•
•
•
•
W indicates write operation.
A[6:0] is the register index.
B[15:0] is the data to be written to the register indexed.
CS
¯ ¯ is edge sensitive – the data is latched on the rising edge of /CS.
PD, Rev 4.1, April 2010
¯ ¯ is use to latch
Production Data
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