wm8595 Wolfson Microelectronics plc, wm8595 Datasheet - Page 21

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wm8595

Manufacturer Part Number
wm8595
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet

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DIGITAL AUDIO DATA FORMATS
w
DEVICE ID AND REVISION
Reading from register R0 returns the device ID. Reading from register R1 returns the device revision
number.
The WM8595 supports a range of common audio interface formats:
Table 10 Device ID and Revision Number
All formats send the MSB first and support word lengths of 16, 20, 24 and 32 bits, with the exception
of 32 bit RJ mode, which is not supported.
Audio data for each stereo channel is time multiplexed with the interface’s left/right clock indicating
whether the left or right channel is present. The left/right clock is also used as a timing reference to
indicate the beginning or end of the data words.
In LJ, RJ and I
times the selected word length. The left/right clock must be high for a minimum of bit clock periods
equivalent to the word length, and low for the same period. For example, for a word length of 24 bits,
the left/right clock must be high for a minimum of 24 bit clock periods and low for a minimum of 24
bit clock periods. Any mark to space ratio is acceptable for the left/right clock provided these
requirements are met.
In DSP modes A and B, left and right channels must be time multiplexed and input on DACDAT.
LRCLK is used as a frame synchronisation signal to identify the MSB of the first input word. The
minimum number of bit clock periods per left/right clock period is two times the selected word length.
Any mark to space ratio is acceptable for the left/right clock provided the rising edge is correctly
positioned.
DEVICE_ID
REGISTER
ADDRESS
REVISION
I
Left Justified (LJ)
Right Justified (RJ)
DSP Mode A
DSP Mode B
00h
01h
2
R0
R1
S
2
S modes, the minimum number of bit clock periods per left/right clock period is two
15:0
BIT
7:0
DEVICE_ID
REVNUM
LABEL
[15:0]
[7:0]
DEFAULT
10000101
10010101
N/A
Device ID
A read of this register will return the device
ID, 0x8595.
Device Revision
A read of this register will return the device
revision number. This number is sequentially
incremented if the device design is updated.
DESCRIPTION
PD, Rev 4.1, April 2010
WM8595
21

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