wm8941 Wolfson Microelectronics plc, wm8941 Datasheet - Page 69
wm8941
Manufacturer Part Number
wm8941
Description
Mono Codec With Speaker Driver And Video Buffer
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8941.pdf
(94 pages)
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Production Data
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3-WIRE SERIAL CONTROL MODE
READBACK IN 3-WIRE MODE
Figure 42 3-Wire Serial Control Interface
Figure 43 Alternative 3-Wire Serial Control Timing
Figure 44 Alternative 3-Wire Serial Control Timing
Table 57 Readback Registers
In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDIN pin. A rising edge on
CSB/GPIO latches in a complete control word consisting of the last 16 bits.
The following two timing diagrams are also supported.
A limited number of Readback addresses are provided to enable ALC operation to be monitored and
to establish the identity and revision of the device.
R0
Software Reset
R1
Power
Management 1
REGISTER
ADDRESS
15:0
2:0
BIT
CHIP_ID
DEVICE_REVIS
ON
LABEL
DEFAULT
Readback the CHIP ID
Readback the DEVICE_REVISON
DESCRIPTION
PD, Rev 4.0, August 2008
WM8941
69
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