pt7a6527 Pericom Technology Inc, pt7a6527 Datasheet - Page 26

• Manufacturer Part Number: pt7a6527
• Description: Hdlc Controller
• Manufacturer: Pericom Technology Inc

|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Figure 24 PT7A6527 Register Map for demultiplexed Address Bus
Table 13 Address Map of HDLC Channel Register (demultiplexed address bus)
Note:
The address values in the multiplexed A/D bus and non-multiplexed address bus cases are related to each other as follows.
Let AD0...7 be the multiplexed address bits and let A0...6 be the non-multiplexed address bits.
Then: A0 = AD0 xor AD3, A1 = AD1, A2 = AD2, A3 = AD4, A4 = AD5, A5 = AD6, A6 = AD7.
Common Registers
Common Configuration Register (CCR)
-- Address: 37/3EH (1FH) Read/Write, value after reset: 000n0000B
Note: The ODS bit selects the driver type simultaneously on all data outputs (and control output TXD2 in master mode). However,
in the single connection IOM mode TXD0 is open-drain independent of the value of ODS.
PT0080(02/09)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
CDEN
MDS1
MDS0
Name
ODS
BNS
CRS
VIS
n
Mode Select
MDS1 MDS0 = 0 0: Single connection, TS mode
MDS1 MDS0 = 0 1: Quad connection, Common control mode
MDS1 MDS0 = 1 0: Single connection, IOM mode
MDS1 MDS0 = 1 1: Quad connection, TS mode
Vectored Interrupt Selection:
0 – IOM channel 0 to 3 (IOM mode), μP data bus bits 0 to 3 for VISR
1 – IOM channel 4 to 7 (IOM mode), μP data bus bits 4 to 7 for VISR
-
Change detection enable
0 – 0 C/I Handler inactive; 1 – 1 C/I Handler active
Bit number select: 0 – PCM frame is at most 256 bits long; 1 - PCM frame is between 257 and 512 bits long
Clock rate select: 0 – DCL clock rate is equal to the data rate; 1 – DCL clock rate is equal to twice the data reat
Output driver select: 0 – Tristate; 1 – Open drain
Address
00 to 0F
10
11
12
15
13
1C
00
15
1D
1E
40
75
1F
20
35
55
60
VISR
ACR
CCR
Read
MODE
RFIFO
STAR
RFBC
26
Read
ISTA
CIR
Description
VISM
Write
ACR
CCR
Channel-A
Register Locations
Channel-B
Register Locations
Channel-D
Register Locations
Channel-C
Register Locations
HDLC controller
CMDR
MODE
XFIFO
Write
ISM
TSR
CIX
Data Sheet
PT7A6527
Ver:4