pt7a6527 Pericom Technology Inc, pt7a6527 Datasheet - Page 11

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pt7a6527

Manufacturer Part Number
pt7a6527
Description
Hdlc Controller
Manufacturer
Pericom Technology Inc
Datasheet

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In the single connection IOM mode the serial interface has an
IOM frame structure and the four HDLC channels are
assigned to the D bits of four consecutive IOM channels. The
Figure 6 Position of Time Slot for Different Channel Widths as a Function of TSR Register Contents
Figure 7 TSC output in Quad Connection Common Control Mode
PT0080(02/09)
FSC
DCL
a) 1-Bit Time-Slot
b) 2-Bit Time-Slot
c) 7-Bit Time-Slot
d) 8-Bit Time-Slot
TSR=0
TSR=0
FSC
DCL
T SC
7 Bits
8 Bits
Active
TSR=0
TSR=0
1 Bit
2 Bits
1
1
11
choice whether the four HDLC controllers are assigned to
IOM channels 0 - 3 or 4 - 7 is governed by the microcontroller
bit VIS (Common Configuration Register). See figure 10.
2
2
3
3
4
4
HDLC controller
Data Sheet
PT7A6527
5
5
Ver:4

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