71m6543h-igtr/f Maxim Integrated Products, Inc., 71m6543h-igtr/f Datasheet - Page 79

• Manufacturer Part Number: 71m6543h-igtr/f
• Description: Energy Meter Ic
• Manufacturer: Maxim Integrated Products, Inc.

•
The power quality is reflected by the VSTAT[2:0] register in I/O RAM space, as shown in
voltage continues to drop (i.e., circuits powered by the V3P3A pin are not backed by the VBAT pin).
When the V3P3A pin falls below 2.8 VDC, the ADC clocks are halted and the amplifiers are unbiased.
Meanwhile, control bits such as ADC_E bit (I/O RAM 0x2704[4]) are not affected, since their I/O RAM
storage is powered from the VDD pin (2.5 VDC). The VDD pin is supplied with power through an internal
2.5 VDC regulator that is connected to the V3P3D pin. In turn, the V3P3D pin is switched to receive
power from the VBAT pin when the V3P3SYS pin drops below 3.0 VDC. Note that the V3P3SYS and
3.3
3.3.1 Events at Power-Down
Power fault detection is performed by internal comparators that monitor the voltage at the V3P3A pin and
also monitor the internally generated VDD pin voltage (2.5 VDC). The V3P3SYS and V3P3A pins must be
tied together at the PCB level, so that the comparators, which are internally connected only to the V3P3A
pin, are able to simultaneously monitor the common V3P3SYS and V3P3A pin voltage. The following
discussion assumes that the V3P3A and V3P3SYS pins are tied together at the PCB level.
During a power failure, as V3P3A falls, two thresholds are detected:
•
VSTAT[2:0] register is located at SFR address F9 and occupies bits 2:0. The VSTAT[2:0] field can only be
read.
In addition to the state of the main power, the VSTAT[2:0] register provides information about the internal
VDD voltage under battery power. Note that if system power (V3P3A) is above 2.8 VDC, the 71M6543F/H
always switches from battery to system power.
The response to a system power fault is almost entirely controlled by firmware. During a power failure,
system power slowly falls. This fall in power is monitored by internal comparators that cause the
hardware to automatically switch over to taking power from the VBAT input. An interrupt notifies the MPU
that the part is now battery powered. At this point, it is the MPU’s responsibility to reduce power by
slowing the clock rate, disabling the PLL, etc.
Precision analog components such as the bandgap reference, the bandgap buffer, and the ADC are
powered only by the V3P3A pin and become inaccurate and ultimately unavailable as the V3P3A pin
V3P3A pins are typically tied together at the PCB level.
v1.0
VSTAT[2:0]
The first threshold, at 3.0 VDC (VSTAT[2:0] = 001, SFR 0xF9[2:0]), warns the MPU that the analog
modules are no longer accurate. Other than warning the MPU, the hardware takes no action when
this threshold is crossed. This comparison produces an internal bit named V3OKA.
The second threshold, at 2.8 VDC, causes the 71M6543F/H to switch to battery power. This
switching happens while the FLASH and RAM systems are still able to read and write. This
comparison produces an internal bit named V3OK.
000
001
010
011
101
Fault and Reset Behavior
Description
System Power OK. V3P3A > 3.0 VDC. Analog modules are functional and accurate.
System Power is low. 2.8 VDC < V3P3A < 3.0 VDC. Analog modules not accurate.
Switch over to battery power is imminent.
The IC is on battery power and VDD is OK. VDD > 2.25 VDC. The IC has full digital
functionality.
The IC is on battery power and 2.25 VDC > VDD > 2.0 VDC. Flash write operations are
inhibited.
The IC is on battery power and VDD < 2.0, which means that the MPU is nearly out of
voltage. A reset occurs in 4 cycles of the crystal clock CK32.
© 2008–2011 Teridian Semiconductor Corporation
Table 63: VSTAT[2:0] (SFR 0xF9[2:0])
71M6543F/H Data Sheet
Table
63. The
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