71m6543h-igtr/f Maxim Integrated Products, Inc., 71m6543h-igtr/f Datasheet - Page 54

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71m6543h-igtr/f

Manufacturer Part Number
71m6543h-igtr/f
Description
Energy Meter Ic
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
3. Write the 8-bit datum into I/O RAM register LKPDAT (I/O RAM 0x2888).
4. Set the LKP_WR bit (I/O RAM 0x2889[0]) to write the 8-bit datum into NV_RAM
5.
6. Repeat steps 3 through 5 until all data has been written to NV RAM.
of reading from and writing to the NV RAM is accelerated by setting the LKPAUTOI bit (I/O RAM 0x2887[7]).
71M6543F/H Data Sheet
For proper operation, the MPU has to load the lookup table with values that reflect the crystal properties
with respect to temperature, which is typically done once during initialization. Since the lookup table is
not directly addressable, the MPU uses the following procedure to load the NV RAM table:
1. Set the LKPAUTOI bit (I/O RAM 0x2887[7]) to enable address auto-increment.
2. Write zero into the I/O RAM register LKPADDR[6:0] (I/O RAM 0x2887[6:0]).
When LKPAUTOI is set, LKPADDR[6:0] (I/O RAM 0x2887[6:0]) auto-increments every time LKP_RD or
LKP_WR is pulsed. It is also possible to perform random access of the NV RAM by writing a 0 to the
LKPAUTOI bit and loading the desired address into LKPADDR[6:0].
2.5.4.5 RTC Interrupts
The RTC generates interrupts each second and each minute. These interrupts are called RTC_1SEC
and RTC_1MIN. In addition, the RTC functions as an alarm clock by generating an interrupt when the
minutes and hours registers both equal their respective target counts as defined in
clock interrupt is called RTC_T. All three interrupts appear in the MPU’s external interrupt 6. See
in the interrupt section for the enable bits and flags for these interrupts.
The minute and hour target registers are listed in
2.5.5 71M6543F/H Temperature Sensor
The 71M6543F/H includes an on-chip temperature sensor for determining the temperature of its
bandgap reference. The primary use of the temperature data is to determine the magnitude of
compensation required to offset the thermal drift in the system for the compensation of current, voltage
and energy measurement and the RTC. See
see
54
The NV RAM table can also be read by writing a 1 into the LKP_RD bit (I/O RAM 0x2889[1]). The process
RTC_TMIN[5:0] 289E[5:0]
RTC_THR[4:0]
Name
2.5.4.4 RTC Temperature Compensation
Wait for LKP_WR to clear (LKP_WR auto-clears when the data has been copied to NV RAM).
If the oscillator temperature compensation feature is not being used, it is possible to use the NV
RAM storage area as ordinary battery-backed NV storage space using the procedure described
above to read and write NV RAM data. In this case, the OSC_COMP bit (I/O RAM 0x28A0[5]) is
reset to disable the automatic oscillator temperature compensation feature.
289F[4:0]
Location Rst
252
253
254
255
3
4
5
6
7
Table 45: I/O RAM Registers for RTC Interrupts
© 2008–2011 Teridian Semiconductor Corporation
0
0
104.40
104.73
105.06
105.39
22.98
23.31
23.64
23.96
24.29
Wk
0
0
R/W The target minutes register. See below.
R/W
Dir
4.5 Metrology Temperature Compensation
on page 52.
The target hours register. The RTC_T interrupt occurs
when RTC_MIN[5:0] becomes equal to RTC_TMIN[5:0]
and RTC_HR[4:0] becomes equal to RTC_THR[4:0].
Description
Table
63
1
45.
63
1
Table
105.06
23.96
44. The alarm
on page 88. Also
Table 33
v1.0

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