71m6543h-igtr/f Maxim Integrated Products, Inc., 71m6543h-igtr/f Datasheet - Page 59

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71m6543h-igtr/f

Manufacturer Part Number
71m6543h-igtr/f
Description
Energy Meter Ic
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
2.5.10.2 Combined DIO and SEG Pins
12 combined DIO/LCD segment pins shared with other functions:
A total of 51 combined DIO/LCD pins are available. These pins can be categorized as follows:
39 combined DIO/LCD segment pins:
v1.0
o
o
o
o
o
o
o
When driving LEDs, relay coils etc., the DIO pins should sink the current into GNDD (as
shown in
to the resistance of the internal switch that connects V3P3D to either V3P3SYS or VBAT. See
6.4.6 V3P3D Switch
Sourcing current in or out of DIO pins other than those dedicated for wake functions, for
example with pullup or pulldown resistors, must be avoided. Violating this rule leads to
increased quiescent current in sleep and LCD modes.
SEGDIO4…SEGDIO25 (22 pins)
SEGDIO28…SEGDIO35 (8 pins)
SEGDIO40…SEGDIO45 (6 pins)
SEGDIO52…SEGDIO54 (3 pins)
SEGDIO0/WPULSE, SEGDIO1/VPULSE (2 pins)
SEGDIO2/SDCK, SEGDIO3/SDATA (2 pins)
SEGDIO26/COM5, SEGDIO27/COM4 (2 pins)
Note:
Resources are selectable only on SEGDIO2 through SEGDIO11 and the
PB pin. See
Value in DIO_Rn[2:0]
Figure 16,
Table 47: Selectable Resources using the DIO_Rn[2:0] Bits
Not recommended
HIGH-Z
Figure 16: Connecting an External Load to DIO Pins
HIGH
LOW
0
1
2
3
4
5
Table
© 2008–2011 Teridian Semiconductor Corporation
BROWNOUT
MISSION
LCD/SLEEP
right), not source it from V3P3D (as shown in
on page 137.
49.
DIO
V3P3SYS
V3P3D
GNDD
VBAT
Resource Selected for SEGDIOn or PB Pin
None
Reserved
T0 (counter0 clock)
T1 (counter1 clock)
High priority I/O interrupt (INT0)
Low priority I/O interrupt (INT1)
Recommended
HIGH-Z
HIGH
LOW
BROWNOUT
MISSION
LCD/SLEEP
DIO
V3P3SYS
VBAT
V3P3D
GNDD
Figure
71M6543F/H Data Sheet
16, left). This is due
59

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