xr16c2850im Exar Corporation, xr16c2850im Datasheet - Page 15

• Manufacturer Part Number: xr16c2850im
• Description: Dual Uart With Tx And Rx Fifo Counters, 128 Bytes Of Fifos And Automatic Rs-485 Half Duplex Control
• Manufacturer: Exar Corporation

xr
REV. 2.1.3
N
Automatic RTS hardware flow control is used to prevent data overrun to the local receiver FIFO. The RTS#
output is used to request remote unit to suspend/resume data transmission. The auto RTS flow control
features is enabled to fit specific application requirement (see
•
•
With the Auto RTS function enabled, the RTS# output pin will not be de-asserted (HIGH) when the receive
FIFO reaches the programmed trigger level, but will be de-asserted when the FIFO reaches the next trigger
level
trigger level below the programmed trigger level. However, even under these conditions, the 2850 will continue
to accept data until the receive FIFO is full if the remote UART transmitter continues to send data.
•
The 2850 has a new feature that provides flow control trigger hysteresis while maintaining compatibility with
the XR16C850, ST16C650A and ST16C550 family of UARTs. With the Auto RTS function enabled, an
interrupt is generated when the receive FIFO reaches the programmed RX trigger level. The RTS# pin will not
be forced HIGH (RTS off) until the receive FIFO reaches the upper limit of the hysteresis level. The RTS# pin
will return LOW after the RX FIFO is unloaded to the lower limit of the hysteresis level. Under the above
described conditions, the 2850 will continue to accept data until the receive FIFO gets full. The Auto RTS
function is initiated when the RTS# output pin is asserted LOW (RTS On).
details for the Auto RTS# Hysteresis levels. Please note that this table is for programmable trigger levels only
(Table D). The hysteresis values for Tables A-C are the next higher and next lower trigger levels in the
corresponding table.
F
2.12
2.13
OTE
IGURE
Enable auto RTS flow control using EFR bit-6.
The auto RTS function must be started by asserting RTS output pin (MCR bit-1 to logic 1 after it is enabled).
Enable RTS interrupt through IER bit-6 (after setting EFR bit-4). The UART issues an interrupt when the
RTS# pin is de-asserted (HIGH) during Auto RTS flow control mode: ISR bit-5 will be set to logic 1.
:
(See Table
Receive Data
Byte and Errors
Table-B selected as Trigger Table for
10. R
128 bytes by 11-bit
Auto RTS (Hardware) Flow Control
Auto RTS Hysteresis
16X or 8X
wide FIFO
Clock
ECEIVER
10). The RTS# output pin will be asserted (LOW) again after the FIFO is unloaded to the next
O
PERATION IN
Receive Data Shift
Register (RSR)
Data FIFO
Receive
Receive
Figure 10
FIFO
Data
AND
A
(Table
Data falls to 8
FIFO Trigger=16
Data fills to 24
Validation
UTO
Data Bit
Example:
- RX FIFO trigger level selected at 16 bytes
10).
RTS F
15
2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
LOW
RTS# re-asserts when data falls below the flow
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
RTS# de-asserts when data fills above the flow
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
(See Note Below)
RHR Interrupt (ISR bit-2) programmed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
Figure
C
ONTROL
11):
M
ODE
Receive Data Characters
Table 13
shows the complete
XR16C2850
RXFIFO1