xr16l651im Exar Corporation, xr16l651im Datasheet - Page 6

• Manufacturer Part Number: xr16l651im
• Description: 2.25v To 5.5v Uart With 32-byte Fifo
• Manufacturer: Exar Corporation

XR16L651
2.25V TO 5.5V UART WITH 32-BYTE FIFO
Pin type: I=Input, O=Output, IO= Input/output, OD=Output Open Drain.
BAUDOUT#
PCMODE#
(RESET#)
RESET
XTAL1
XTAL2
DDIS#
RCLK
OP1#
OP2#
N
ENIR
GND
VCC
IM#
NC
AME
P
1,25
14
15
12
36
22
13
35
37
34
31
43
18
IN
5
#
T
Pwr
Pwr
YPE
O
O
O
O
O
I
I
I
I
I
I
-
Crystal or external clock input. Caution: this input is not 5V tolerant.
Crystal or buffered clock output
Receiver Clock
This input is used as external 16X clock input to the receiver section. Connect
the BAUDOUT# pin to this input externally.
Baud Rate Generator Output (active low)
This pin provides the 16X clock of the selected data rate from the baud rate
generator. The RCLK pin must be connected externally to BAUDOUT# when
the receiver is operating at the same data rate.
When the PC mode is selected, the baud rate generator clock output is inter-
nally connected to the RCLK input. This pin then functions as the LPT-1
printer port decode logic output, see
PC Mode Select (active low)
When this input is at logic 0, it enables the on-board chip select decode func-
tion according to PC ISA bus COM[4:1] and IRQ[4:3] port definitions. See
Table 3
Drive Disable Output
This pin goes to a logic 0 whenever the host CPU is reading data from the
651. It can control the direction of a data bus transceiver between the CPU
and 651 or other logic functions.
Enable Infrared Mode (active high)
This pin can be used to start up the UART in wireless infrared mode. This
input is sampled when the reset input signal (RESET or RESET#) is de-
asserted. The TX output would idle at logic 0 instead of normal logic 1. The
software infrared enable bit (MCR bit-6) will have full enable/disable control
after the power up.
Reset Input
A 40 ns minimum active pulse on this pin will reset the internal registers and
all outputs. The UART transmitter output will be held at logic 1 (if ENIR pin is
at a logic 0), the receiver input will be ignored and outputs are reset. See
UART Reset Conditions in
mode, reset input is active high. When IM# pin is at a logic 1, Motorola bus
mode, reset input is active low.
Intel or Motorola data bus interface select
A logic 0 selects Intel bus interface and a logic 1 selects Motorola interface.
This input affects the functionality of IOR#, IOW#, CS# and INT pins.
Output Port 1
General purpose output.
Output Port 2
General purpose output.
2.25V to 5.5V supply voltage
All inputs, except XTAL1, are 5V tolerant.
Power supply common ground.
No Connect
for details. This pin has an internal 100k pull-up resistor.
6
Table 13
D
ESCRIPTION
. When IM# pin is at a logic 0, Intel bus
Table 3
.
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REV. 1.3.0