ak4372 ETC-unknow, ak4372 Datasheet - Page 46

• Manufacturer Part Number: ak4372
• Description: Dac With Built-in Pll & Hp-amp
• Manufacturer: ETC-unknow

4) LIN/RIN/MIN → Lineout
(1) When AVDD and DVDD are supplied separately, AVDD should be powered-up after DVDD rises up to 1.6V or
(2) PMVCM bit should be changed to “1” after the PDN pin is set to “H”.
(3) LINL, MINL, RINR and MINR bits should be changed to “1” after PMVCM bit is changed to “1”.
(4) When LINL, MINL, RINR or MINR bit is changed to “1”, the LIN, RIN or MIN pin is biased to 0.475 x AVDD.
(5) PMLO bit should be changed to “1” at least 2ms (in case external capacitance at the VCOM pin is 2.2μF) after LINL,
(6) When the PMLO bit is changed, pop noise is output from the LOUT/ROUT pins.
MS0684-E-02
more. The PDN pin should be set to “H” at least 150ns after power is supplied. MCKI, BICK and LRCK can be
stopped when DAC is not used.
MINL, RINR and MINR bits are changed to “1”.
PMLO bit
Power Supply
PDN pin
PMVCM bit
LINL, MINL,
RINR, MINR bits
LIN/RIN/MIN pins
LMUTE,
ATTS3-0 bits
LOUT/ROUT pins
Figure 39. Power-up/down sequence of LIN1/RIN1/LIN2/RIN2/LIN3/RIN3 and Lineout
10H(MUTE)
(1) >150ns
(Hi-Z)
(Hi-Z)
(2) >0s
(4)
(3) >0s
(5) >2ms
(6)
0FH(0dB)
- 46 -
(6)
Don’t care
(Hi-Z)
(Hi-Z)
(5) >2ms
(6)
[AK4372]
2008/12