ak4372 ETC-unknow, ak4372 Datasheet - Page 11

• Manufacturer Part Number: ak4372
• Description: Dac With Built-in Pll & Hp-amp
• Manufacturer: ETC-unknow

(Ta=25°C; AVDD = DVDD=1.6 ∼ 3.6V; C
MS0684-E-02
Parameter
Master Clock Input Timing
LRCK Timing
MCKO Output Timing (PLL mode)
Serial Interface Timing
Control Interface Timing (3-wire Serial mode)
Frequency (PLL mode)
Pulse Width Low
Pulse Width High
AC Pulse Width
Frequency
Frequency
Duty Cycle (Except fs=32kHz, PS1-0= “00”)
Duty Cycle: Slave Mode
Slave Mode (M/S bit = “0”):
Master Mode (M/S bit = “1”):
CCLK Period
CCLK Pulse Width Low
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN Edge to CCLK “↑”
CCLK “↑” to CSN Edge
BICK Period
BICK Pulse Width Low
BICK Pulse Width High
SDATA Hold Time
SDATA Setup Time
LRCK Edge to BICK “↑”
BICK “↑” to LRCK Edge
BICK Frequency (BF bit = “1”)
BICK Duty
BICK “↓” to LRCK
SDATA Hold Time
SDATA Setup Time
(Except PLL Mode,
PLL4-0 bit = “01110”, “01111”)
(PLL Mode, PLL4-0 bits = “01110”)
(PLL Mode, PLL4-0 bits = “01111”)
(Except PLL Mode,
PLL4-0 bit = “01110”, “01111”)
(PLL Mode,
PLL4-0 bit = “01110”, “01111”)
(Except PLL Mode,
PLL4-0 bit = “01110”, “01111”)
(PLL Mode,
PLL4-0 bit = “01110”, “01111”)
Pulse Width High
(EXT mode)
(fs=32kHz, PS1-0= “00”)
Master Mode
(Note
(Note
(Note
(Note
(BF bit = “0”)
25)
23)
(Note
22)
22)
(Note
(Note
(Note
(Note
24)
27)
27)
26)
26)
SWITCHING CHARACTERISTICS
L
= 20pF; unless otherwise specified)
Symbol
fCLKO
tMBLR
tCLKH
tBCKH
tBCKH
tCCKH
tCLKL
tBCKL
tBCKL
tCCKL
dMCK
dMCK
tACW
dBCK
tCSW
fCLK
fCLK
tBCK
tBCK
tBCK
fBCK
fBCK
tCCK
tCDH
tLRB
tBLR
tSDH
tSDH
tCDS
tCSH
tSDS
tSDS
Duty
Duty
tCSS
fs
- 11 -
312.5 or 1/(64fs)
0.4 x tBCK
0.4 x tBCK
0.4/fCLK
0.4/fCLK
11.2896
2.048
0.256
18.5
min
100
100
−50
200
150
45
40
50
50
50
50
50
50
80
80
40
40
50
50
8
-
-
-
-
-
-
-
1/(32fs)
1/(64fs)
44.1
64fs
32fs
typ
50
33
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1/(32fs)
24.576
12.288
max
27
48
55
60
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
[AK4372]
2008/12
Units
MHz
MHz
MHz
kHz
Hz
Hz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%
%