xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 250

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xrt94l33

Manufacturer Part Number
xrt94l33
Description
Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
Manufacturer
Exar Corporation
Datasheet

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XRT94L33
Rev.1.2.0.
Transmit STS-3c Path – Transmit Z5 Byte Value Register (Address = 0x19B3)
2.2.7.3.10.2
The Transmit STS-3c POH Processor block permits the user to specify the contents of the Z5 byte, within the
“outbound” STS-3c SPE, via data applied to the “TxPOH_n” input pin.
The user can configure the Transmit STS-3c POH Processor block to accomplish this by performing the
following steps.
STEP 1 – Write the value “1” into Bit 0 (Z5 Byte Insertion Type) within the “Transmit STS-3c Path –
SONET Control Register – Byte 1”, as depicted below.
Transmit STS-3c Path – SONET Control Register – Byte 1 (Address = 0x1982)
This step configures the Transmit STS-3c POH Processor block to use the “TxPOH_n” input port as the
source for the Z5 byte, within each “outbound” STS-3c SPE. In this mode, the Transmit STS-3c POH
Processor block will accept the value, corresponding to the Z5 byte (via the “TxPOH_n” input port) and it will
write this data into the Z5 byte position, within the “outbound” STS-3c SPE.
STEP 2 – Begin providing the values of the “outbound” Z5 byte to the “TxPOH_n” input port.
The procedure for applying the Z5 byte to the “TxPOH_n” input port is presented below.
Using the “TxPOH” Input Port to insert the Z5 byte value into the outbound STS-3c SPE data-stream
If the user intends to externally insert the Z5 byte into the outbound STS-3c SPE, via the “TxPOH_n” input
port, then they must design some external circuitry (which can be realized in an ASIC, FPGA or CPLD
solution) to do to the following.
• Continuously sample the “TxPOHEnable_n” and the “TxPOHFrame_n” output pins upon the rising edge of
the “TxPOHClk_n” output clock signal.
A simple illustration of this “external circuit” being interfaced to the “TxPOH Input Port” is presented below in
Figure 44
B
R/O
B
R/W
IT
0
IT
0
7
7
B
R/O
Setting and Controlling the Outbound Z5 Byte via the “TxPOH_n Input Port”
IT
0
B
R/W
6
IT
0
Unused
6
B
R/O
IT
0
5
B
R/W
IT
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
B
R/O
Transmit_Z5_Byte_Value[7:0]
IT
0
4
B
R/W
IT
0
4
Insertion
B
Type
250
R/W
Z5
IT
1
3
B
R/W
IT
0
3
Insertion
B
Type
R/W
Z4
IT
0
2
B
R/W
IT
0
Insertion
2
Type
B
R/W
Z3
IT
0
1
B
R/W
Insertion
IT
0
B
Type
R/W
1
xr
H4
IT
0
0
B
R/W
IT
0
0

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