lf3310 LOGIC Devices Incorporated, lf3310 Datasheet - Page 14

• Manufacturer Part Number: lf3310
• Description: Horizontal / Vertical Digital Image Filter
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
12. Table 18 shows an example of
loading data into a select register.
Data value 00FH is loaded into hori-
zontal select register 2. Table 19 shows
an example of loading data into verti-
cal limit register 7. Data value 390H is
HPAUSE/VPAUSE
1st Word - Address
2nd Word - Bank 0
3rd Word - Bank 1
4th Word - Bank 2
5th Word - Bank 3
6th Word - Bank 4
7th Word - Bank 5
8th Word - Bank 6
9th Word - Bank 7
F
F
T
HPAUSE/VPAUSE
IGURE
IGURE
ABLE
HCF/VCF
HCF/VCF
HLD/VLD
HLD/VLD
15. C
16. R
17. L
CLK
11-0
CLK
11-0
W1: Limit Register loaded with new data on this rising clock edge.
W1: Round Register loaded with new data on this rising clock edge.
IMIT
OEFFICIENT
OUND
H/VCF
R
ADDR
R
EGISTER
0
0
0
1
1
0
1
1
0
ADDR
EGISTER
11
1
1
B
H/VCF
ANK
L
0
0
1
1
0
1
0
1
0
OADING
L
10
L
OADING
OADING
H/VCF
loaded as the lower limit and 743H is
loaded as the upper limit.
It takes 9S clock cycles to load S coef-
ficient sets into the device. Therefore,
it takes 2304 clock cycles to load all
0
1
0
0
0
1
0
1
0
DATA
S
DATA
EQUENCE WITH
S
9
1
F
EQUENCE WITH
H/VCF
1
ORMAT
0
0
1
0
1
1
0
1
1
8
H/VCF
0
0
0
0
1
0
0
0
0
14
ROUND REGISTER
LIMIT REGISTER
HPAUSE
7
Horizontal / Vertical Digital Image Filter
DATA
HPAUSE
DATA
H/VCF
2
0
0
1
1
1
0
0
0
1
2
6
H/VCF
AND
AND
0
0
0
1
1
0
1
1
0
VPAUSE I
5
VPAUSE I
H/VCF
256 coefficient sets. Assuming an 83
MHz clock rate, all 256 coefficient sets
can be updated in 28.8 µs, which is
well within vertical blanking time. It
DATA
0
1
0
1
0
0
1
0
0
Video Imaging Products
4
3
H/VCF
MPLEMENTATION
1
0
0
0
0
0
0
0
0
MPLEMENTATION
3
H/VCF
0
0
0
1
0
0
0
0
0
DATA
2
H/VCF
9/14/2005-LDS.3310-I
4
1
0
1
1
1
0
1
0
1
LF3310
W1
1
H/VCF
0
0
1
0
1
1
0
0
1
W1
0