lf3310 LOGIC Devices Incorporated, lf3310 Datasheet - Page 13

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lf3310

Manufacturer Part Number
lf3310
Description
Horizontal / Vertical Digital Image Filter
Manufacturer
LOGIC Devices Incorporated
Datasheet

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DEVICES INCORPORATED
load. The three most significant bits
(HCF
face
Configuration/Control Registers (see
Table 8). The nine least significant bits
(HCF
is to be loaded (see Tables 9-14). For
example, to load address 15 of the hor-
izontal coefficient banks, the first data
value into the LF Interface
00FH. To load horizontal limit regis-
ter 10, the first data value should
be C0AH. The first address value
should be loaded into the interface on
the same clock cycle that latches the
HIGH to LOW transition of HLD (see
Figures 12 and 13).
The next value(s) loaded into the
interface are the data value(s) which
will be stored in the bank or register
defined by the address value. When
F
F
HPAUSE/VPAUSE
HPAUSE/VPAUSE
IGURE
IGURE
TM
11-9
8-0
HCF/VCF
HCF/VCF
will load coefficient banks or
) are the address for whatever
HLD/VLD
) determine if the LF Inter-
HLD/VLD
14. C
15. C
CLK
11-0
CLK
11-0
W1: Coefficient Set 1 written to coefficient banks during this clock cycle.
W1: Configuration Register loaded with new data on this rising clock edge.
W2: Select Register loaded with new data on this rising clock edge.
OEFFICIENT
ONFIGURATION AND
ADDR
ADDR
TM
1
should be
1
B
CONFIGURATION REGISTER
ANK
L
COEF
S
OADING
ELECT
loading coefficient banks, the interface
will expect eight values to be loaded
into the device after the address value.
The eight values are coefficients 0
through 7. When loading select or
Configuration Registers, the interface
will expect one value after the address
value. When loading round registers,
the interface will expect four values
after the address value. When loading
limit registers, the interface will expect
two values after the address value.
Figures 12 and 13 show the data load-
ing sequences for the coefficient banks
and Configuration/Control Registers.
Both HPAUSE and VPAUSE allow the
user to effectively slow the rate of data
loading through the LF Interface
When HPAUSE is HIGH, the LF Inter-
face
the Horizontal Filter is held until
0
TM
S
R
affecting the data used for
DATA
EQUENCE WITH
EGISTER
1
W1
COEF
L
COEFFICIENT SET 1
13
OADING
1
Horizontal / Vertical Digital Image Filter
HPAUSE
S
ADDR
EQUENCE WITH
TM
2
.
AND
SELECT REGISTER
VPAUSE I
HPAUSE is returned to a LOW.
When VPAUSE is HIGH, the LF Inter-
face
Vertical Filter is held until VPAUSE
is returned to a LOW. Figures 14
through 17 display the effects of both
HPAUSE and VPAUSE while loading
coefficient and control data.
Table 15 shows an example of loading
data into the coefficient banks. The
following data values are written into
address 10 of coefficient banks 0
through 7: 210H, 543H, C76H, 9E3H,
701H, 832H, F20H, 143H. Table 16
shows an example of loading data
into a Configuration Register. Data
value 003H is written into Configura-
tion Register 4. Table 17 shows an
example of loading data into a round
register. Data value 7683F4A2H is
written into horizontal round register
Video Imaging Products
HPAUSE
TM
affecting the data used for the
MPLEMENTATION
AND
COEF
DATA
7
VPAUSE
1
9/14/2005-LDS.3310-I
LF3310
W2
W1

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