km4132g271a ETC-unknow, km4132g271a Datasheet - Page 23

• Manufacturer Part Number: km4132g271a
• Description: 128k 32bit Banks Synchronous Graphic
• Manufacturer: ETC-unknow

KM4132G271A
10. Clock Suspend Exit & Power Down Exit
11. Auto Refresh & Self Refresh
*Note :
1. Active power down : one or more bank active state.
2. Precharge power down : both bank precharge state.
3. The auto refresh is the same as CBR refresh of conventional DRAM.
4. Before executing auto/self refresh command, both banks must be idle state.
5. (S)MRS, Bank Active, Auto/Self Refresh, Power Down Mode Entry.
6. During self refresh mode, refresh interval and refresh operation are perfomed internally.
2) Self Refresh
1) Clock Suspend (=Active Power Down) Exit
1) Auto Refresh
No precharge commands are required after Auto Refresh command.
During tRC from auto refresh command, any other command can not be accepted.
After self refresh entry, self refresh mode is kept while CKE is LOW.
During self refresh mode, all inputs expect CKE will be don't cared, and outputs will be in Hi-Z state.
During tRC from self refresh exit command, any other command can not be accepted.
Before/After self refresh mode, burst auto refresh cycle (1K cycles) is recommended.
Internal
CMD
CMD
CMD
CLK
CKE
CKE
CKE
CLK
CLK
CLK
Note 6
Note 3
Note 1
PRE
PRE
Note 4
Note 4
t
t
RP
RP
AR
SR
t
SS
RD
¡ó
t
¡ó
RC
¡ó
¡ó
¡ó
¡ó
2) Power Down (=Precharge Power Down) Exit
Internal
¡ó
¡ó
¡ó
¡ó
CMD
CMD
CKE
CLK
CLK
t
RC
Note 5
Note 2
CMD
Rev.0 (August 1997)
NOP
t
CMOS SGRAM
SS
ACT