s87c751-5a28 NXP Semiconductors, s87c751-5a28 Datasheet - Page 18

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s87c751-5a28

Manufacturer Part Number
s87c751-5a28
Description
80c51 8-bit Microcontroller Family 2k/64 Otp/rom, I2c, Low Pin Count
Manufacturer
NXP Semiconductors
Datasheet

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Programming and Verifying Security Bits
Security bits are programmed employing the same techniques used
to program the USER EPROM and KEY arrays using serial data
streams and logic levels on port pins indicated in Table 6. When
programming either security bit, it is not necessary to provide
address or data information to the 87C751 on ports 1 and 3.
Verification occurs in a similar manner using the RESET serial
stream shown in Table 6. Port 3 is not required to be driven and the
results of the verify operation will appear on ports 1.6 and 1.7.
Ports 1.7 contains the security bit 1 data and is a logical one if
programmed and a logical zero if not programmed. Likewise, P1.6
contains the security bit 2 data and is a logical one if programmed
and a logical zero if not programmed.
Table 6. Implementing Program/Verify Modes
NOTE:
1998 May 01
80C51 8-bit microcontroller family
2K/64 OTP/ROM, I
Program user EPROM
Verify user EPROM
Program key EPROM
Verify key EPROM
Program security bit 1
Program security bit 2
Verify security bits
Pulsed from V
V
PP
PROGRAMMING
/V
CLK SOURCE
IH
RESET
XTAL1
VOLTAGE
P0.2
P0.1
SOURCE
PULSES
IH
to V
UNDEFINED
UNDEFINED
OPERATION
IL
ADDRESS STROBE
and returned to V
MIN 2 MACHINE
CYCLES
A0–A10
2
C, low pin count
BIT 0
IH
CONTROL
.
RESET
LOGIC
Figure 6. Entry into Program/Verify Modes
BIT 1
Figure 5. Programming Configuration
BIT 2
BIT 3
SERIAL CODE
TEN BIT SERIAL CODE
18
29AH
29AH
296H
296H
292H
292H
298H
BIT 4
Erasure Characteristics
Erasure of the EPROM begins to occur when the chip is exposed to
light with wavelengths shorter than approximately 4,000 angstroms.
Since sunlight and fluorescent lighting have wavelengths in this
range, exposure to these light sources over an extended time (about
1 week in sunlight, or 3 years in room level fluorescent lighting)
could cause inadvertent erasure. For this and secondary effects,
it is recommended that an opaque label be placed over the
window. For elevated temperature or environments where solvents
are being used, apply Kapton tape Flourless part number 2345–5 or
equivalent.
The recommended erasure procedure is exposure to ultraviolet light
(at 2537 angstroms) to an integrated dose of at least 15W-s/cm
Exposing the EPROM to an ultraviolet lamp of 12,000 W/cm
for 20 to 39 minutes, at a distance of about 1 inch, should be
sufficient.
Erasure leaves the array in an all 1s state.
P3.0–P3.7
P0.0/ASEL
P0.1
P0.2
XTAL1
RESET
BIT 5
87C751
P1.0–P1.7
BIT 6
V
V
P0.1 (PGM/)
CC
SS
BIT 7
V
V
V
–*
–*
–*
–*
IH
IH
IH
BIT 8
+5V
83C751/87C751
BIT 9
Product specification
P0.2 (V
DATA BUS
SU00317
SU00302
V
V
V
V
V
V
V
PP
PP
PP
PP
IH
IH
IH
PP
)
2
rating
2
.

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