s87c751-5a28 NXP Semiconductors, s87c751-5a28 Datasheet - Page 10

• Manufacturer Part Number: s87c751-5a28
• Description: 80c51 8-bit Microcontroller Family 2k/64 Otp/rom, I2c, Low Pin Count
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Special Function Register – Interrupt Subsystem
Because the interrupt structure is single level on the 83C751, there
is no need for the IP SFR, so it is not used.
Serial Communications
The 8XC751 contains an I
the 80C51 UART. The I
interface with all of the hardware necessary to support multimaster
and slave operations. Also included are receiver digital filters and
timer (timer I) for communication watch-dog purposes. The I
serial port is controlled through four special function registers; I
control, I
Special Function Register –
Serial Communications
The 83C751 contains many of the special function registers (SFR)
that are found on the 80C51. Due to the different peripheral features
on the 83C751, there are several additional SFRs and several that
have been changed.
Since the standard UART found on the 80C51 has been replaced by
the I
Table 2. I
ROM CODE SUBMISSION
When submitting ROM code for the 80C751, the following must be specified:
1. 2k byte user ROM data
1998 May 01
I
I
I
I
2
2
2
2
80C51 8-bit microcontroller family
2K/64 OTP/ROM, I
C control
C data
C configuration
C status
ADDRESS
0000H to 07FFH
2
C serial interface, the UART SFRs, SCON, and SBUF have
2
C data, I
NAME
2
C Special Function Register Addresses
2
C status, and I
REGISTER ADDRESS
2
C serial port is a single bit hardware
2
C serial communications port instead of
SYMBOL
I2CON
I2CFG
I2DAT
I2STA
2
C configuration.
2
C, low pin count
CONTENT
DATA
ADDRESS
D8
98
99
F8
2
C
2
C
MSB
DF
FF
9F
–
10
BIT(S)
7:0
been replaced by I2CON and I2DAT, and two additional I
have been added (I2STA and I2CFG).
I/O Port Latches (P0, P1, P3)
The port latches function the same as those on the 80C51. Since
there is no port 2 on the 83C751, the P2 latch is not used. Port 0 on
the 83C751 has only 3 bits, so only 3 bits of the P0 SFR have a
useful function.
Special Function Register – I/O Port Latches
There is no Port2 on the 8XC751, so P2 is not used. Also, only 3
bits of P0 SFR have a useful function.
Data Pointer (DPTR)
The data pointer (DPTR) consists of a high byte (DPH) and a low
byte (DPL). In the 80C51 this register allows the access of external
data memory using the MOVX instruction. Since the 83C751 does
not support MOVX or external memory accesses, this register is
generally used as a 16-bit offset pointer of the accumulator in a
MOVC instruction. DPTR may also be manipulated as two
independent 8-bit registers.
DE
FE
9E
–
DD
FD
9D
–
BIT ADDRESS
DC
9C
FC
–
DB
9B
FB
–
COMMENT
User ROM Data
83C751/87C751
DA
9A
FA
LSB
–
Product specification
D9
F9
99
–
2
C registers
D8
98
F8
–