mcimx50 Freescale Semiconductor, Inc, mcimx50 Datasheet - Page 77

• Manufacturer Part Number: mcimx50
• Description: I.mx50 Applications Processors For Consumer Products
• Manufacturer: Freescale Semiconductor, Inc

4.9.4
This section describes the AC timing specifications of the FEC. The i.MX50 FEC supports 10/100 Mbps
RMII with MII serial management interface. The RMII and serial management signals are compatible with
transceivers operating at a voltage of 3.3 V.
4.9.4.1
Table 53
input timings listed in
4.9.4.2
Table 54
channel timings listed in
compliant with the IEEE 802.3 RMII specification. However, the FEC can function correctly with a
maximum MDC frequency of 15 MHz.
Freescale Semiconductor
M10 FEC_MDC falling edge to FEC_MDIO output invalid (minimum propagation delay)
M11 FEC_MDC falling edge to FEC_MDIO output valid (max propagation delay)
M12 FEC_MDIO (input) to FEC_MDC rising edge setup
M13 FEC_MDIO (input) to FEC_MDC rising edge hold
.
ID
Num
M9
SD2
SD3
SD4
ID
lists RMII asynchronous inputs signal timing information.
lists RMII serial management channel timings.
FEC AC Timing Parameters
FEC_COL
RMII Async Inputs Signal Timing (FEC_COL)
RMII Serial Management Channel Timing (FEC_MDIO and FEC_MDC)
eSDHC Output Delay
eSDHC Input Setup Time
eSDHC Input Hold Time
Table 52. eMMC4.4 Interface Timing Specification (continued)
FEC_COL minimum pulse width
Table
i.MX50 Applications Processors for Consumer Products, Rev. 0
Table
eSDHC Input/Card Outputs CMD, DAT (Reference to CLK)
53.
Characteristics
Parameter
Figure 38. MII Async Inputs Timing Diagram
54. The MDC frequency should be equal to or less than 2.5 MHz to be
Table 53. RMII Async Inputs Signal Timing
Table 54. RMII Transmit Signal Timing
Characteristics
Figure 39
Symbols
M9
t
t
ISU
t
OD
IH
Min
1.5
shows RMII serial management
Figure 38
Min
2.5
1.5
–5
Max
—
shows MII asynchronous
Max
Min Max
18
—
—
—
5
0
0
Electrical Characteristics
FEC_TX_CLK period
—
—
—
5
Unit
Unit
ns
ns
ns
Unit
ns
ns
ns
ns
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