mc9s08qg8 Freescale Semiconductor, Inc, mc9s08qg8 Datasheet - Page 67
mc9s08qg8
Manufacturer Part Number
mc9s08qg8
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08QG8.pdf
(300 pages)
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1
5.8.3
This high page register contains a single write-only control bit. A serial background command such as
WRITE_BYTE must be used to write to SBDFR. Attempts to write this register from a user program are
ignored. Reads always return 0x00.
Freescale Semiconductor
BDFR is writable only through serial background debug commands, not from user programs.
Reset:
BDFR
Field
0
W
R
System Background Debug Force Reset Register (SBDFR)
Background Debug Force Reset — A serial background command such as WRITE_BYTE can be used to allow
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program. To enter user mode, PTA4/ACMPO/BKGD/MS must be high immediately after
issuing WRITE_BYTE command. To enter BDM, PTA4/ACMPO/BKGD/MS must be low immediately after issuing
WRITE_BYTE command. See
0
0
7
Figure 5-4. System Background Debug Force Reset Register (SBDFR)
= Unimplemented or Reserved
0
0
6
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
Table 5-5. SBDFR Register Field Descriptions
0
0
5
Table A-8., “Control
0
0
4
Description
Timing,” for more information.
Chapter 5 Resets, Interrupts, and General System Control
3
0
0
0
0
2
0
0
1
BDFR
0
0
0
1
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