mc9s08qg8 Freescale Semiconductor, Inc, mc9s08qg8 Datasheet - Page 57

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mc9s08qg8

Manufacturer Part Number
mc9s08qg8
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 5
Resets, Interrupts, and General System Control
5.1
This section discusses basic reset and interrupt mechanisms and the various sources of reset and interrupts
in the MC9S08QG8/4. Some interrupt sources from peripheral modules are discussed in greater detail
within other sections of this data sheet. This section gathers basic information about all reset and interrupt
sources in one place for easy reference. A few reset and interrupt sources, including the computer
operating properly (COP) watchdog and real-time interrupt (RTI), are not part of on-chip peripheral
systems with their own chapters but are part of the system control logic.
5.2
Reset and interrupt features include:
5.3
Resetting the MCU provides a way to start processing from a known set of initial conditions. During reset,
most control and status registers are forced to initial values and the program counter is loaded from the
reset vector (0xFFFE:0xFFFF). On-chip peripheral modules are disabled and I/O pins are initially
configured as general-purpose, high-impedance inputs with pullup devices disabled. The I bit in the
condition code register (CCR) is set to block maskable interrupts so the user program has a chance to
initialize the stack pointer (SP) and system control settings. SP is forced to 0x00FF at reset.
The MC9S08QG8/4 has the following sources for reset:
Each of these sources, with the exception of the background debug force reset, has an associated bit in the
system reset status register.
Freescale Semiconductor
Multiple sources of reset for flexible system configuration and reliable operation
Reset status register (SRS) to indicate source of most recent reset
Separate interrupt vectors for each module (reduces polling overhead) (see
External pin reset (PIN) — enabled using RSTPE in SOPT1
Power-on reset (POR)
Low-voltage detect (LVD)
Computer operating properly (COP) timer
Illegal opcode detect (ILOP)
Illegal address detect (ILAD)
Background debug force reset
Introduction
Features
MCU Reset
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
Table
5-2)
57

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