lpc2917 NXP Semiconductors, lpc2917 Datasheet - Page 14

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lpc2917

Manufacturer Part Number
lpc2917
Description
Arm9 Microcontroller With Can And Lin
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
8. Block description
LPC2917_19_1
Preliminary data sheet
8.1.1 Overview
8.1 Flash memory controller
Table 7.
[1]
[2]
[3]
[4]
The Flash Memory Controller (FMC) interfaces to the embedded flash memory for two
tasks:
Base clock
BASE_MSCSS_CLK
BASE_UART_CLK
BASE_SPI_CLK
BASE_TMR_CLK
BASE_ADC_CLK
BASE_CLK_TESTSHELL
This clock is always on (cannot be switched off for system safety reasons)
In the peripheral subsystem parts of the Timers, Watchdog Timer, SPI and UART have their own clock
source. See
In the Power Clock and Reset Control subsystem parts of the CGU, RGU PMU have their own clock
source. See
The clock should remain activated when system wake-up on timer or UART is required.
Providing memory data transfer
Memory configuration via triggering, programming and erasing
Base clock and branch clock overview
Section 8.4
Section 8.8
Rev. 1.01 — 15 November 2007
for details.
for details.
Branch clock name
CLK_MSCSS_VPB
CLK_MSCSS_MTMR0
CLK_MSCSS_MTMR1
CLK_MSCSS_PWM0
CLK_MSCSS_PWM1
CLK_MSCSS_PWM2
CLK_MSCSS_PWM3
CLK_MSCSS_ADC1_V
PB
CLK_MSCSS_ADC2_V
PB
CLK_UART0
CLK_UART1
CLK_SPI0
CLK_SPI1
CLK_SPI2
CLK_TMR0
CLK_TMR1
CLK_TMR2
CLK_TMR3
CLK_ADC1
CLK_ADC2
CLK_TESTSHELL_IP
ARM9 microcontroller with CAN and LIN
…continued
Parts of the device clocked by
this branch clock
VPB side of the MSCSS
Timer 0 in the MSCSS
Timer 1 in the MSCSS
PWM 0
PWM 0
PWM 0
PWM 0
VPB side of ADC 1
VPB side of ADC 2
UART 0 interface clock
UART 1 interface clock
SPI 0 interface clock
SPI 1 interface clock
SPI 2 interface clock
Timer 0 clock for counter part
Timer 1 clock for counter part
Timer 2 clock for counter part
Timer 3 clock for counter part
Control of ADC 1, capture sample
result
Control of ADC 2, capture sample
result
LPC2917/19
© NXP B.V. 2007. All rights reserved.
Remark
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