lpc2106fhn48/00 NXP Semiconductors, lpc2106fhn48/00 Datasheet - Page 19

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lpc2106fhn48/00

Manufacturer Part Number
lpc2106fhn48/00
Description
Single-chip 32-bit Microcontrollers; 128 Kb Isp/iap Flash With 64 Kb/32 Kb/16 Kb Ram
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
LPC2104_2105_2106_6
Product data sheet
6.12.1 Features
6.13.1 Features
6.14.1 Features
6.13 General purpose timers
6.14 Watchdog timer
The Timer is designed to count cycles of the peripheral clock (PCLK) and optionally
generate interrupts or perform other actions at specified timer values, based on four
match registers. It also includes four capture inputs to trap the timer value when an input
signal transitions, optionally generating an interrupt.
The purpose of the Watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the Watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the Watchdog within a predetermined
amount of time.
Compliant with Serial Peripheral Interface (SPI) specification.
Synchronous, Serial, Full Duplex, Communication.
Combined SPI master and slave.
Maximum data bit rate of one eighth of the input clock rate.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
Up to four (TImer 1) and three (Timer 0) 32-bit capture channels, that can take a
snapshot of the timer value when an input signal transitions. A capture event may also
optionally generate an interrupt.
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Up to four (Timer 1) and three (Timer 0) external outputs corresponding to match
registers, with the following capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Rev. 06 — 25 July 2006
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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