lpc2106fhn48/00 NXP Semiconductors, lpc2106fhn48/00 Datasheet - Page 14

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lpc2106fhn48/00

Manufacturer Part Number
lpc2106fhn48/00
Description
Single-chip 32-bit Microcontrollers; 128 Kb Isp/iap Flash With 64 Kb/32 Kb/16 Kb Ram
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
LPC2104_2105_2106_6
Product data sheet
6.5.1 Interrupt sources
Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assigned
to this category. Any of the interrupt requests can be assigned to any of the 16 vectored
IRQ slots, among which slot 0 has the highest priority and slot 15 has the lowest.
Non-vectored IRQs have the lowest priority.
The VIC combines the requests from all the vectored and non-vectored IRQs to produce
the IRQ signal to the ARM processor. The IRQ service routine can start by reading a
register from the VIC and jumping there. If any of the vectored IRQs are requesting, the
VIC provides the address of the highest-priority requesting IRQs service routine,
otherwise it provides the address of a default routine that is shared by all the non-vectored
IRQs. The default routine can read another VIC register to see what IRQs are active.
Table 4
one interrupt line connected to the Vectored Interrupt Controller, but may have several
internal interrupt flags. Individual interrupt flags may also represent more than one
interrupt source.
Table 4.
Block
WDT
-
ARM Core
ARM Core
Timer 0
Timer 1
UART 0
UART 1
PWM0
I
SPI
-
PLL
RTC
System Control
System Control
System Control
2
C-bus
lists the interrupt sources for each peripheral function. Each peripheral device has
Interrupt sources
Flag(s)
Watchdog Interrupt (WDINT)
Reserved for software interrupts only
EmbeddedICE, DbgCommRx
EmbeddedICE, DbgCommTx
Match 0 to 3 (MR0, MR1, MR2, MR3)
Capture 0 to 3 (CR0, CR1, CR2, CR3)
Match 0 to 3 (MR0, MR1, MR2, MR3)
Capture 0 to 3 (CR0, CR1, CR2, CR3)
Rx Line Status (RLS)
Transmit Holding Register empty (THRE)
Rx Data Available (RDA)
Character Time-out Indicator (CTI)
Rx Line Status (RLS)
Transmit Holding Register empty (THRE)
Rx Data Available (RDA)
Character Time-out Indicator (CTI)
Modem Status Interrupt (MSI)
Match 0 to 6 (MR0, MR1, MR2, MR3, MR4, MR5, MR6)
SI (state change)
SPIF, MODF
reserved
PLL Lock (PLOCK)
RTCCIF (Counter Increment), RTCALF (Alarm)
External Interrupt 0 (EINT0)
External Interrupt 1 (EINT1)
External Interrupt 2 (EINT2)
Rev. 06 — 25 July 2006
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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