atmega161-4pi ATMEL Corporation, atmega161-4pi Datasheet - Page 58
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atmega161-4pi
Manufacturer Part Number
atmega161-4pi
Description
8-bit Microcontroller With 16k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA161-4PI.pdf
(159 pages)
- Current page: 58 of 159
- Download datasheet (2Mb)
Watchdog Timer
Watchdog Timer Control
Register – WDTCR
58
ATmega161(L)
The Watchdog Timer is clocked from a separate On-chip Oscillator that runs at 1 MHz.
This is the typical value at V
V
can be adjusted (see Table 20 for a detailed description). The WDR (Watchdog Reset)
instruction resets the Watchdog Timer. Eight different clock cycle periods can be
selected to determine the reset period. If the reset period expires without another
Watchdog Reset, the ATmega161 resets and executes from the Reset Vector. For tim-
ing details on the Watchdog Reset, refer to page 28.
To prevent unintentional disabling of the Watchdog, a special turn-off sequence must be
followed when the Watchdog is disabled. Refer to the description of the Watchdog Timer
Control Register for details.
Figure 39. Watchdog Timer
• Bits 7..5
These bits are reserved bits in the ATmega161 and will always read as zero.
• Bit 4
This bit must be set (one) when the WDE bit is cleared. Otherwise, the Watchdog will
not be disabled. Once set, hardware will clear this bit to zero after four clock cycles.
Refer to the description of the WDE bit for a Watchdog disable procedure.
• Bit 3
When the WDE is set (one), the Watchdog Timer is enabled and if the WDE is cleared
(zero), the Watchdog Timer function is disabled. WDE can only be cleared if the
Bit
$21 ($41)
Read/Write
Initial Value
CC
levels. By controlling the Watchdog Timer prescaler, the Watchdog Reset interval
–
–
WDTOE: Watchdog Turn-off Enable
WDE: Watchdog Enable
–
Res: Reserved Bits
R
7
–
0
6
–
R
0
CC
= 5V. See characterization data for typical values at other
R
5
–
0
WDTOE
R/W
4
0
WDE
R/W
3
0
WDP2
R/W
2
0
WDP1
R/W
1
0
WDP0
R/W
1228D–AVR–02/07
0
0
WDTCR
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