a8290 Allegro MicroSystems, Inc., a8290 Datasheet

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a8290

Manufacturer Part Number
a8290
Description
A8290 Single Lnb Supply And Control Voltage Regulator
Manufacturer
Allegro MicroSystems, Inc.
Datasheet
Functional Block Diagram
A
B
C
Features and Benefits
▪ 2-wire serial I
▪ LNB voltages (16 programmable levels) compatible with
▪ Tracking switch-mode power converter for lowest dissipation
▪ Integrated converter switches and current sensing
▪ Provides up to 700 mA continuous load current
▪ Output current limit of 900 mA typical, with 48 ms timer
▪ Static current limit circuit allows full current at startup and
▪ Push-pull output stage minimizes 13
▪ Adjustable rise/fall time via external timing capacitor
▪ Built-in tone oscillator, factory-trimmed to 22 kHz
▪ Four methods of 22 kHz tone generation, via I
▪ Filter bypass MOSFET minimizes losses during tone transmit
▪ 22 kHz tone detector facilitates DiSEqC™ 2.0 decoding
▪ Provides V
▪ Diagnostics for output voltage level, input supply UVLO,
▪ Auxiliary modulation input
▪ LNB overcurrent with timer
Package:
8290-DS, Rev. 9
▪ Cable disconnect diagnostic
R9-C11 network is needed only when a highly
inductive load is applied, such as ProBand LNB.
D2, D4, D5, and R10 are used for surge protection.
Either C12 or C9 should be used, but not both.
status (read)
all common standards
13
output transition times for highly capacitive loads
facilitates DiSEqC™ tone encoding, even at no-load
bits and/or external pin
SWM (single wire multiswitch) operation
and DiSEqC™ tone output
18 V output transition; reliably starts wide load range
OUT
2
C™ -compatible interface: control (write) and
within 19 to 21 VDC at 700 mA for
28 pin 5 mm × 5mm
MLP/QFN (suffix ET)
Single LNB Supply and Control Voltage Regulator
R1 R2 R3 R4
V
DD
R5 R6
V
VREG
220 nF
EXTM
C3
S
BFC
TDO
SDA
ADD
SCL
IRQ
18 V and 18
Compatible
100
Regulator
C1
Interface
I
2
C™-
2
nF
DAC
C™ data
13 V
100 μF
C 2
Fault Monitor
VIN
PAD
f sw
OCP
PNG
TSD
VUV
Converter
Boost
LNB
Voltage
Control
33 μH
L1
Oscillator
LX
GND
Description
Intended for analog and digital satellite receivers, this single
low noise block converter regulator (LNBR) is a monolithic
linear and switching voltage regulator, specifically designed to
provide the power and the interface signals to an LNB down
converter via coaxial cable. The A8290 requires few external
components, with the boost switch and compensation circuitry
integrated inside of the device. A high switching frequency is
chosen to minimize the size of the passive filtering components,
further assisting in cost reduction. The high levels of component
integration ensure extremely low noise and ripple figures.
The A8290 has been designed for high efficiency, utilizing
the Allegro
switch has been optimized to minimize both switching and
static losses. To further enhance efficiency, the voltage drop
across the tracking regulator has been minimized.
The A8290 has integrated tone detection capability, to support
full two-way DiSEqC™ communications. Several schemes
are available for generating tone signals, all the way down to
no-load, and using either the internal clock or an external time
source. A DiSEqC™ filter bypass switch is also integrated, to
minimize the output impedance during tone generation.
Continued on the next page…
TCAP
f sw
100 μF
C5
GNDLX
D1
EXTM
Divider
Clock
TGate
Shape
Wave
C6
1 μF
1 H
L3
22 kHz
TMode
BOOST
®
advanced BCD process. The integrated boost
Linear
Stage
TDO
VCP
Charge
Pump
VPump
100 nF
C4
Tone
Detect
BFC
LNB
BFO
BFI
TCAP
TDI
D2
D3
B
100
R8
220 nF
C7
10 nF
C8
C10
10 nF
R9
30
C11
0.68 μF
A
220 μH
R10
1
C12
15
R7
L2
B
C
C13
10 nF
A8290
220 nF
C9
C
D4
B
D5
B
V
OUT

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a8290 Summary of contents

Page 1

... C™ data The A8290 has integrated tone detection capability, to support full two-way DiSEqC™ communications. Several schemes are available for generating tone signals, all the way down to no-load, and using either the internal clock or an external time source. A DiSEqC™ ...

Page 2

... The device uses a 2-wire bidirectional serial interface, compatible with the I 2 C™ standard, that operates up to 400 kHz. The A8290 is supplied in a lead (Pb) free 28-lead MLP/QFN. Selection Guide Part Number 7 in. reel, 1500 pieces/reel A8290SETTR-T b ...

Page 3

... A8290 Single LNB Supply and Control Voltage Regulator Terminal List Table Name ADD BFC BFI BFO BOOST EXTM GND GNDLX IRQ LNB LX 4, 13, 15-18, NC 20, 21, 23 PAD SCL SDA TCAP TDI TDO VCP VIN VREG Device Pin-out Diagram BOOST 1 VCP 2 TCAP 3 PAD ...

Page 4

... A8290 Single LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS Characteristics General Set-Point Accuracy, Load and Line Regulation Supply Current Boost Switch On Resistance Switching Frequency Switch Current Limit Linear Regulator Voltage Drop TCAP Pin Current 2 Output Voltage Rise Time Output Voltage Pull-Down Time ...

Page 5

... A8290 Single LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS (continued) Characteristics Cable Disconnect Current Source Bypass FET Bypass FET Control (BFC) Logic Input Input Leakage Bypass FET On Resistance Turn On/Off Delay 2 Tone Tone Frequency Tone Amplitude, Peak-to-Peak Tone Duty Cycle ...

Page 6

... A8290 Single LNB Supply and Control Voltage Regulator ELECTRICAL CHARACTERISTICS (continued) Characteristics SCL Low Time SCL High Time Data Setup Time Data Hold Time Setup Time for Stop Condition 2 I C™ Address Setting ADD Voltage for Address 0001,000 ADD Voltage for Address 0001,001 ...

Page 7

... LNB output current is limited to 900 mA typical, and the IC will be shut down if the overcurrent condition lasts for more than 48 ms. If this occurs, the A8290 must be reenabled for normal operation. The system should provide sufficient time between successive restarts to limit internal power dissipation; a minimum recommended ...

Page 8

... Short Circuit Handling If the LNB output is shorted to ground, the LNB output current will be clamped to 900 mA, typical. If the short circuit condition lasts for more than 48 ms, the A8290 will be disabled and the OCP bit will be set. Auto-Restart After a short circuit condition occurs, the host controller should periodically reenable the A8290 to check if the short circuit has been removed ...

Page 9

... This is a serial interface that uses two bus lines, SCL and SDA, to access the internal Control and Status registers of the A8290. Data is exchanged between a microcontroller (master) and the A8290 (slave). The clock input to SCL is generated by the master, while SDA functions as either an input or an open drain output, depending on the direction of the data. ...

Page 10

... SDA low during the ninth clock cycle. During a data write from the master, the A8290 also pulls SDA low during the clock cycle that follows the data byte, in order to indicate that the data has been successfully received. In both cas- es, the master device must release the SDA line before the ninth clock cycle, in order to allow this handshaking to occur ...

Page 11

... C™ point is further defined in the Status Register section. The bits in the Status register are defined such that the all-zero condition in- dicates that the A8290 is fully active with no fault conditions. When V does not respond to any requests until the internal logic supply V has reached its operating level ...

Page 12

... Control Registers (I 2 C™-Compatible Write Register) All main functions of the A8290 are controlled through the I compatible interface via the 8-bit Control registers. As the A8290 contains numerous control options necessary to have two control registers. Each register contains bits of data (bit Table 2 ...

Page 13

... A8290 Single LNB Supply and Control Voltage Regulator Table 3. Control Register Address (I1, I0 and 11 Bit Bit 0 TMODE Tone Mode. Selects between the use of an external 22 kHz logic signal or the use of the internal 22 kHz oscillator to control the tone generation on the LNB output selects the external tone and a 1 selects the internal tone ...

Page 14

... A8290 Single LNB Supply and Control Voltage Regulator Table 4. Output Voltage Amplitude Selection VSEL3 VSEL2 VSEL1 VSEL0 ...

Page 15

... Status registers. In all fault cases, once the bit is set, it remains latched until the A8290 is read by the I master, assuming the fault has been resolved. The current status of the LNB output is indicated by the dis- able bit, DIS ...

Page 16

... V occurred disabling the LNB outputs. The disable bit, DIS, will also be set and the A8290 will not reenable the output until so instructed by writing the relevant bit into the control registers. The status of the undervoltage condition is sampled on the rising edge of the 9 present, then the VUV bit will be reset allowing the master to reenable the LNB out- put if required ...

Page 17

... A8290 Single LNB Supply and Control Voltage Regulator Table 7. Status Register 2 Bit Bit 0 CAD Cable between LNB and the LNB head is disconnected. When cable disconnect test mode is applied, the LNB linear regulator is disabled and current source is applied between the BOOST and LNB output. If the LNB volts rise above 21 V, CAD will be set to 1 ...

Page 18

... A8290 Single LNB Supply and Control Voltage Regulator Table 8. Component Selection Table Component C3 220 nF C8 C12 b 220 nF X5R or X7R, 0805 C1, C4 100 nF X5R or X7R, 0603 C2, C5 100 μ nF C10, C13 10 nF X5R or X7R, 0402 or 0603 C11 0.68 μ ...

Page 19

... A8290 Single LNB Supply and Control Voltage Regulator 29X 0.08 C +0.05 0.25 –0.07 +0.20 0.55 –0. C™ trademark of Philips Semiconductors. DiSEqC™ trademark of Eutelsat S.A. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products ...

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