W83977A Winbond Electronics Corp America, W83977A Datasheet - Page 97

• Manufacturer Part Number: W83977A
• Description: Winbond I/O
• Manufacturer: Winbond Electronics Corp America

9.3.12
Register Location:
Default Value:
Attribute:
Size:
0-7
9.3.13 General Purpose Event 0 Status Register 1 (GP0STS1)
Register Location:
Default Value:
Attribute:
Size:
These bits indicate the status of the SCI input, which is set when the device's IRQ is raised. If the
corresponding enable bit in the SCI interrupt enable register (in GP0EN1) is set, an SCI interrupt is
raised and routed to the output pin. Wrinting a 1 clears the bit, and wrinting a 0 has no effect. If the
bit is
Bit
not
Reserved
cleared, new IRQ to the SCI logic input is ignored and no SCI interrupt will be raised.
Power Management 1 Timer 4 (PM1TMR4)
Name
8 bits
8 bits
Reserved. These bits always return zeros.
<CR60,
00h
Read only
<CR62,
00h
Read/write
7
7
6
6
61> + BH System I/O Space
63> System I/O Space
5
5
4
4
3
3
-87 -
2
2
1
Description
1
0
0
URBSCISTS
URASCISTS
FDCSCISTS
PRTSCISTS
KBCSCISTS
MOUSCISTS
Reserved
Reserved
Publication Release Date:March 1998
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
W83977TF
PRELIMINARY
Revision 0.62