W83977A Winbond Electronics Corp America, W83977A Datasheet - Page 90

• Manufacturer Part Number: W83977A
• Description: Winbond I/O
• Manufacturer: Winbond Electronics Corp America

9.3
The ACPI register model consists of the fixed register blocks that perform the ACPI functuions. A
register block may be a event register block which deals with ACPI events or a control register block
which deals with control features. The order in the event register block is a status register followed by
an enable register.
Each event register, if implemented, contains two two register: a status register and an enable
register, of 16 bits wide each. The status register indicates which event triggers the ACPI System
Control Interrupt ( SCI ). When the hardware event occurs, the corresponding status bit will be set.
However, the corresponding enable bit is also required to be set before an SCI
raised. If the enable bit is not set, the software can examine the state of the hardware event by
reading the status bit without generating an SCI interrupt.
Any status bit, unless otherwise noted, can only be set by specific hardware event. It is cleared by
writing a 1 to its bit position and writing a 0 has no effect. Except some special status bits, every
status bit has the corresponding enable bit on the same bit position in the enable register. Those
status bits which have no corresponding enable bit are read for special purpose.
unimplemented enable bits always return zero, and writing to these bits should has no effect.
The control bit in the control register provides some special control function over the hardware event,
or some special control over SCI event. Reserved or unimplemented control bits always return zero,
and writing to those bits should has no effect.
Table 9-1 (sec. 9.3.21)
register block is named as PM1a_EVT_BLK in the ACPI specification and is specified in CR60, 61 of
logical device A.
Table 9-2 (sec. 9.3.21)
purpose event block GPE0 is named as GPE0_BLK in the ACPI specification and is specified in
CR62, 63 of logical device A. The base address of general-purpose event block GPE1 is named as
GPE1_BLK in the ACPI specification and is specified in CR64, 65 of logical device A.
9.3.1 Power Management 1 Status Register 1 (PM1STS1)
Register Location:
Default Value:
Attribute:
Size:
ACPI Registers (ACPIRs)
8 bits
lists the GPE register block and its registers.
<CR60,
00h
Read/write
lists the PM1 register block and its registers. The base address of PM1
7
6
61> System I/O Space
5
4
3
-80 -
2
1
0
Publication Release Date:March 1998
TMR_STS
Reserved
Reserved
Reserved
BM_STS
GBL_STS
Reserved
Reserved
The base address of general-
W83977TF
PRELIMINARY
interrupt could be
Reverved or
Revision 0.62