W83977A Winbond Electronics Corp America, W83977A Datasheet - Page 93

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W83977A

Manufacturer Part Number
W83977A
Description
Winbond I/O
Manufacturer
Winbond Electronics Corp America
Datasheet

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9.3.5 Power Management 1 Control Register 1 (PM1CTL1)
Register Location:
Default Value:
Attribute:
Size:
0
1
2
3-7
9.3.6 Power Management 1 Control Register 2 (PM1CTL2)
Register Location:
Default Value:
Attribute:
Size:
0-7
Bit
Bit
SCI_EN
BM_RLD
GBL_RLS
Reserved
Reserved
Name
Name
7
7
8 bits
8 bits
6
6
Reserved. These bits always return zeros.
Select whether the power management event triggers an SCI or an SMI
interrupt.
generate an SCI interrupt. When this bit is reset and SMI_EN bit is set, then
the power management events will generate an SMI interrupt.
This is the bus master reload enable bit. If this bit is set and BM_CNTRL is
set, an SCI interrupt is raised.
The global release bit. This bit is used by the ACPI software to raise an event
to the BIOS software. The BIOS software has a corresponding enable and
status bit to control its ability to receive the ACPI event. Setting GBL_RLS
sets BIOS_STS, and it generates an SMI interrupt if BIOS_EN is also set.
Reserved. These bits always return zeros.
<CR60,
00h
Read/write
<CR60,
00h
Read/write
5
5
4
4
61> + 4H System I/O Space
61> + 5H System I/O Space
When this bit is set, then the power management events will
3
3
2
2
1
1
-83 -
0
0
Description
SCI_EN
BM_RLD
GBL_RLD
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Description
Publication Release Date:March 1998
W83977TF
PRELIMINARY
Revision 0.62

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